w364m72v-essb ETC-unknow, w364m72v-essb Datasheet - Page 10

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w364m72v-essb

Manufacturer Part Number
w364m72v-essb
Description
64mx72 Synchronous Dram
Manufacturer
ETC-unknow
Datasheet
spec i fied for the clock pin) prior to CKE going back
HIGH. Once CKE is HIGH, the SDRAM must have NOP
commands is sued (a minimum of two clocks) for t
because time is required for the com ple tion of any internal
refresh in progress.
Upon exiting the self refresh mode, AUTO REFRESH
com mands must be issued as both SELF REFRESH and
AUTO REFRESH utilize the row refresh counter.
January 2005
Rev. 1
NOTE:
Stress greater than those listed under "Absolute Maximum Ratings" may cause per ma nent damage to the device. This is a stress rating only and
func tion al op er a tion of the device at these or any other conditions greater than those in di cat ed in the operational sections of this specifi cation is not
implied. Exposure to ab so lute maximum rating con di tions for extended periods may affect reliability.
NOTE:
Refer to Application Note “PBGA Thermal Resistance Correlation” at www.wedc.com in the application notes section for modeling conditions.
Parameter
Voltage on V
Voltage on NC or I/O pins relative to Vss
Operating Temperature TA (Mil)
Operating Temperature TA (Ind)
Storage Temperature, Plastic
Parameter
Input Capacitance: CLK
Addresses, BA0-1 Input Capacitance
Input Capacitance: All other input-only pins
Input/Output Capacitance: I/Os
Description
Junction to Ambient (No Airfl ow)
Junction to Ball
Junction to Case (Top)
White Electronic Designs
CC
, V
CCQ
Supply relative to Vss
ABSOLUTE MAXIMUM RATINGS
BGA THERMAL RESISTANCE
CAPACITANCE (NOTE 2)
XSR
Theta JB
Theta JC
Theta JA
Symbol
Symbol
CIO
CI1
CI2
CA
,
10
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
-55 to +125
-55 to +125
-40 to +85
-1 to 4.6
-1 to 4.6
Max
TBD
TBD
TBD
TBD
Max
TBD
TBD
TBD
W364M72V-XSBX
Unit
Unit
Unit
C/W
C/W
C/W
°C
°C
°C
pF
pF
pF
pF
V
V
ADVANCED

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