APL3201QAI-TRG ANPEC [Anpec Electronics Coropration], APL3201QAI-TRG Datasheet - Page 11

• Manufacturer Part Number: APL3201QAI-TRG
• Description: Li+ Battery Charger with Thermal Regulation
• Manufacturer: ANPEC [Anpec Electronics Coropration]

APL3201
STAT Pins
The STAT1 and STAT2 outputs indicate four charger
operations. These two pins can be used to drive LEDs or
communicate to the host processor. When status pins
are monitored by a processor, there should be a 10k
pull-up resistor to connect each status pin and the V
the processor; furthermore, when the status is viewed by
the LED, the LED with a current rating is less than 10mA
and a resistor should be selected to connect the LED in
series, so the current will be limited to the desired cur-
rent value. The resistor is calculated by the following
equation:
In other words, the LED and resistor between the input
and each status pin shoule be in series.
Capacitor Selection
Typically, a 4.7 F ceramic capacitor is used to connect
from VIN to GND. For high charging current, it is recom-
mended to use a larger input bypass capacitance to re-
duce supply noise. There is a ceramic capacitor con-
necting from BATT to GND for proper stability. To work
well with most application, at least a 2.2 F X5R ceramic
capacitor is required.
Thermal Consideration
The APL3201 is available in a thermally enhanced QFN
package with an exposed pad. It is recommended to con-
nect the exposed pad to a large copper ground plane on
the backside of the circuit board through several thermal
vias for heatsinking. The exposed pad transfers heat away
from the device, allowing the APL3201 to charge the bat-
tery with maximum current while minimizing the increase
in die temperature.
The most common measure of package thermal perfor-
mance is thermal resistance measured from the device
junction to the air surrounding the package surface (
The
Applicaiton Information
Copyright
Rev. A.4 - Mar., 2009
JA
can be calculated by the following equation:
R
JA
2
3 ,
T
ANPEC Electronics Corp.
(
J
P
V
IN
D
T
A
V
P
LED
D
_
ON
)
CC
JA
of
).
11
where:
T
T
P
The device power dissipation, P
charge rate and the voltage drop across the internal FET.
It can be calculated by the following equation:
PCB Layout Consideration
The APL3201 is packaged in a thermally enhanced QFN
package. The package includes a thermal pad to provide
an effective thermal contact between the device and the
printed circuit board. Connecting the exposed pad to a
large copper ground plane on the backside of the circuit
board through several thermal vias for heatsinking is
recommended. Connecting the battery to BATT as close
to the device as possible provides accurate battery volt-
age sensing. All decoupling capacitors and filter capaci-
tors should be placed as close as possible to the device.
The high-current charge path into VIN and from the BATT
pin must be short and wide to minimize voltage drops.
J
A
D
=device junction temperature
= ambient temperature
=device power dissipation
P
D
V
IN
V
BATT
I
CHG
D
, is the function of the
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