CT2553-FP AEROFLEX [Aeroflex Circuit Technology], CT2553-FP Datasheet - Page 27

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CT2553-FP

Manufacturer Part Number
CT2553-FP
Description
CT2553 / 2554 / 2555 / 2556 Advanced Integrated MUX (AIM) Hybrid FOR MIL-STD-1553
Manufacturer
AEROFLEX [Aeroflex Circuit Technology]
Datasheet
Aeroflex Circuit Technology
SYMBOL
16MHz Clock
(Internal)
tpw1
MEM/REG
td1
td2
td4
READYD
tz
SELECT
(Internal)
A15-A00
D15-D00
tr
MEMOE
MEMCS
STRBD
RD/WR
1. STRBD to IOEN (low) delay is two clock cycles. If contention occurs, delay is two clock cycles following release of bus.
2. CPU must release STRBD within 1.5µs of IOEN going active. READYD will go away within one clock cycle maximum.
IOEN
NOTE:
DESCRIPTION
READYD low delay (CPU Handshake)
IOEN high delay (CPU Handshake)
READYD pulse width (CPU Handshake)
CPU MEMOE low delay
READYD to STRBD release
(SELECT
Figure 30 – CPU Reads from RAM Timing
See Note 1
tz
STRBD) to IOEN
td4
CPU Reads from RAM
See Note 2
RAM ADDRESS VALID
27
td1
RAM DATA VALID
tr
tpw1
MIN
50
-
-
-
-
-
SCDCT2553 REV B 8/6/99 Plainview NY (516) 694-6700
td2
MAX
1.37
150
100
1.8
20
-
UNITS
ns
ns
ns
ns
µs
µs

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