MB15U36PFV FUJITSU [Fujitsu Component Limited.], MB15U36PFV Datasheet - Page 20

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MB15U36PFV

Manufacturer Part Number
MB15U36PFV
Description
Dual PLL Frequency Synthesizer with On-Chip Prescaler
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet

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Application Example: Fastlock Mode
From Controller
Notes: 1) Package Type: 20-pin SSOP
2) Clock, Data, LE: Insert a pull-down or pull-up resistor as needed to prevent oscillation when the terminals are left open
3) The Fastlock mode is controlled by the LDS/FDS bits and the CMC
4x normal mode), the LD/fout pin (open drain output) is “L”, enabling the parallel resistor in the loop filter. This effectively increases the LPF bandwidth,
allowing the loop to lock faster. After the loop has locked onto a new frequency, the CMC
impedance state and returning the LPF bandwidth back to its original value.
LD/f
Clock
10
11
OUT
OSC
Data
12
9
OUTPUT
OUTPUT
OUT
TCXO
OSC
LE
13
8
IN
1000 pF
GND
GND
14
7
1000 pF
1000 pF
1
2
MB15U36
Xfin
Xfin
15
6
1
2
RF1
bit. When the CMC
VCO
VCO
fin
fin
16
5
1
2
1000 pF
1000 pF
GND
GND
RF1
4
17
RF1
LPF
LPF
bit is set to “L”, forcing the LD/fout output pin into a high
1
2
bit is set to “H” (the RF1 charge pump current is increased
Do
18
Do
3
1
2
3V
Vp
Vp
19
2
1
2
.1 µF
3V
.1 µF
3V
Vcc
Vcc
20
1
2
1
.1 µF
Fujitsu Microelectronics, Inc.
3V
MB15U36
.1 µF
21

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