MB86H01 FUJITSU [Fujitsu Component Limited.], MB86H01 Datasheet
MB86H01
Manufacturer Part Number
MB86H01
Description
SD Multi-Standard Decoder for Set-Top-Box and iDTV
Manufacturer
FUJITSU [Fujitsu Component Limited.]
Datasheet
1.MB86H01.pdf
(2 pages)
Features
Introduction
MPEG-2 dual decoders and H.264 decoder
Fujitsu’s new multi-standard decoders include the necessary functionality for TVs and STBs to process SD digital broadcasts, including
two (dual) MPEG-2 decoders and one H.264 decoder. The dual MPEG-2 decoders enable the processing of two video streams that can
be used in digital video recorders (DVR) with twin tuners. It also allows viewing of two programs at the same time with picture-in-picture,
and is suited to DVRs with twin tuners.
Functions necessary for processing SD broadcasts integrated on a single chip
The devices integrate into a single chip a 202.5MHz ARC Tangent-A4 CPU together with the necessary video and audio decode
functions, and screen display functionality needed to receive digital broadcast. This enables easy system creation by customers.
Small form-factor necessary for portable devices
Using proprietary H.264 decoder technology, the power consumption for the H.264 decoder is reduced to a low level. The MB86H01
series offers a 27 x 27mm package (PBGA 256-pin), as well as a small 10 x 10mm package (FBGA 240-pin) suited for use in portable or
small form-factor devices. A high speed USB 2.0 OTG controller is also integrated, providing excellent connectivity to external devices,
such as digital cameras.
Succession to existing SmartMPEG series architecture
The new devices have package and pin compatibility with the existing SmartMPEG-C series, as well as maintaining architectural
compatibility. This enables existing SmartMPEG users to easily upgrade or develop their systems.
DVB SD Set-Top-Box System Configuration
The MB86H01 is an advanced set-top-box decoder designed to meet the needs of tomorrow’s set-top-box market. This LSI
supports the Digital Broadcasting (DVB) standard adopted in many countries in Europe, Asia and others, with the advanced
features to support multi-standard decoding of a H.264 and two MPEG-2 decoders integrated into a single chip. This LSI has a
202.5MHz ARC Tangent-A4 CPU inside as well as video/audio decoder function, and other functions needed to receive digital
broadcasts.
This LSI is suitable for various applications such as SD set-top-box or iDTV for H.264 broadcasting regions, PVR applications
with two MPEG-2 decoders.
The MB86H01 comes with the Fujitsu Driver Application Programming Interface (FAPI) to help customers achieve the shortest
possible development cycle. FAPI is a complete driver set allowing fast and efficient customer software design
RF Tuner
RF Tuner
DVB-T
SD Multi-Standard Decoder for Set-Top-Box
DVB-T
example
CI module
Demodulator
Demodulator
DVB-T
DVB-T
CI-Slot
CI-Slot
MB86H01
TS
TS
128M-512Mbit
DDR 135MHz
128M-512Mbit
DDR 135MHz
SD Multi-format
SD Multi-format
Decoder Chip
Decoder Chip
USB
PHY
USB
USB
USB
PHY
MB86H01
MB86H01
IR_IN
IR Rx
IR Rx
FLASH
FLASH
CVBS/RGB
Audio
AMP
and iDTV
CVBS/
Audio
Speaker
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MB86H01 Summary of contents
Page 1
... Small form-factor necessary for portable devices Using proprietary H.264 decoder technology, the power consumption for the H.264 decoder is reduced to a low level. The MB86H01 series offers 27mm package (PBGA 256-pin), as well as a small 10 x 10mm package (FBGA 240-pin) suited for use in portable or small form-factor devices ...
Page 2
... Supply Voltage 1.2V core, 2.5/3.3V I/O Operating clock frequency Internal: 135MHz / DDR memory interface: 135MHz Packaging MB86H01AA: 256-pin PBGA, 27sq.mm (1.27-mm pitch) MB86H01AB: 240-pin FBGA, 10sq.mm (0.5-mm pitch) FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ North and South America FUJITSU MICROELECTRONICS AMERICA, INC ...