ACS712_06 ALLEGRO [Allegro MicroSystems], ACS712_06 Datasheet - Page 10

• Manufacturer Part Number: ACS712_06
• Description: Fully Integrated, Hall Effect-Based Linear Current Sensor with 2.1 kVRMS Voltage Isolation and a Low-Resistance Current Conductor
• Manufacturer: ALLEGRO [Allegro MicroSystems]

ACS712
Chopper Stabilization Technique
Chopper Stabilization is an innovative circuit technique that is
used to minimize the offset voltage of a Hall element and an asso-
ciated on-chip amplifier. Allegro patented a Chopper Stabiliza-
tion technique that nearly eliminates Hall IC output drift induced
by temperature or package stress effects. This offset reduction
technique is based on a signal modulation-demodulation process.
Modulation is used to separate the undesired dc offset signal from
the magnetically induced signal in the frequency domain. Then,
using a low-pass filter, the modulated dc offset is suppressed
while the magnetically induced signal passes through the filter.
As a result of this chopper stabilization approach, the output
voltage from the Hall IC is desensitized to the effects of tempera-
ture and mechanical stress. This technique produces devices that
have an extremely stable Electrical Offset Voltage, are immune to
thermal stress, and have precise recoverability after temperature
cycling.
Typical Applications
Application 2. Peak Detecting Circuit
Application 4. Rectified Output. 3.3 V scaling and rectification application
for A-to-D converters. Replaces current transformer solutions with simpler
ACS circuit. C1 is a function of the load resistance and filtering desired.
R1 can be omitted if the full range is desired.
I
P
C
0.1 μF
1
2
3
4
BYP
IP+
IP+
IP–
IP–
ACS712
I
P
+5 V
FILTER
VIOUT
C
0.1 μF
1
2
3
4
GND
VCC
BYP
IP+
IP+
IP–
IP–
ACS712
8
7
6
5
+5 V
FILTER
VIOUT
10 kΩ
R
GND
VCC
F
8
7
6
5
C
1 nF
1 MΩ
C
0.1 μF
R1
F
OUT
R
2 kΩ
33 kΩ
R2
F
V
V
OUT
C
1 nF
OUT
F
10 kΩ
R1
2.1 kVRMS Voltage Isolation and a Low-Resistance Current Conductor
+
–
330 kΩ
R3
1N4448W
D1
U1
LT1178
C2
0.1 μF
10 kΩ
R4
C1
Fully Integrated, Hall Effect-Based Linear Current Sensor with
C1
0.1 μF
D1
1N914
A-to-D
Converter
Q1
2N7002
V
V
PEAK
RESET
This technique is made possible through the use of a BiCMOS
process that allows the use of low-offset and low-noise amplifiers
in combination with high-density logic integration and sample
and hold circuits.
Application 5. 10 A Overcurrent Fault Latch. Fault threshold set by R1 and
R2. This circuit latches an overcurrent fault and holds it until the 5 V rail is
powered down.
Application 3. This configuration increases gain to 610 mV/A
(tested using the ACS712ELC-05A).
Hall Element
I
P
C
0.1 μF
1
2
3
4
BYP
IP+
IP+
IP–
IP–
I
ACS712
P
+5 V
FILTER
C
0.1 μF
VIOUT
1
2
3
4
BYP
Regulator
VCC
GND
Concept of Chopper Stabilization Technique
IP+
IP+
IP–
IP–
ACS712
+5 V
FILTER
8
7
6
5
VIOUT
VCC
GND
100 kΩ
R1
100 kΩ
R2
C
0.01 μF
8
7
6
5
F
R
1 kΩ
F
100 kΩ
R1
33 kΩ
R2
115 Northeast Cutoff, Box 15036
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 [phone]
www.allegromicro.com
V
C
1 nF
OUT
F
1
3
+
–
Clock/Logic
5
4
2
3
Amp
3.3 kΩ
LM321
R3
+
–
4
5
2
D1
1N914
U1
LMV7235
1
V
C1
1000 pF
OUT
100 kΩ
R
PU
Fault
Low-Pass
Filter
10