stk672-050-e ON Semiconductor, stk672-050-e Datasheet - Page 9

• Manufacturer Part Number: stk672-050-e
• Description: Thick-film Hybrid Ic Unipolar Constant-current Chopper External Excitation Pwm Circuit With Built-in Microstepping Controller Stepping Motor Driver Sine Wave Drive Output Current 3.0a No Heat Sink*
• Manufacturer: ON Semiconductor

Input Signal Functions and Timing
• CLK (phase switching clock)
• CWB (Method for setting the rotation direction)
• RETURN (Forcible return to the origin for the currently excited phase)
• ENABLE (Controls the on/off state of the A, A, B, and B excitation drive outputs and selects either operating or hold
1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure
2) Built-in noise rejection circuit
3) Notes: The currently excited (driven) phase can be forcibly moved to the origin by switching this input from low to
as the internal state of this hybrid IC.)
1) Input frequency range: DC to 50kHz
2) Minimum pulse width: 10μs
3) Duty: 40 to 60% (However, the minimum pulse width takes precedence when M3 is high.)
4) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure
5) Built-in multi-stage noise rejection circuit
6) Function:
1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure
2) Function:
1) Pin circuit type: Built-in pull-up resistor (20kΩ, typical) CMOS Schmitt trigger structure
2) Function:
3) Notes: When M3 is low, the CWB input must not be changed for about 6.25μs before or after a rising or falling
- When M3 is high or open: The phase excited (driven) is advanced one step on each CLK rising edge.
- When M3 is low: The phase is advanced one step by both rising and falling edges, for a total of two steps per cycle.
- When CWB is low: The motor turns in the clockwise direction.
- When CWB is high: The motor turns in the counterclockwise direction.
- When ENABLE is high or open: Normal operating state
- When ENABLE is low: This hybrid IC goes to the hold state and excitation drive output (motor current) is
Phase excitation counter clock
high. Normally, if this input is unused, it must be left open or connected to V CC 2.
edge on the CLK input.
Control output timing
System clock
CLK input
forcibly turned off. In this mode, the hybrid IC system clock is stopped and no inputs
other than the reset input have any effect on the hybrid IC state.
CLK Input Acquisition Timing (M3 = Low)
Control output switching timing
STK672-050-E
Excitation counter up/down
A06850
No.5228-9/19