ACS8526P SEMTECH [Semtech Corporation], ACS8526P Datasheet - Page 42
ACS8526P
Manufacturer Part Number
ACS8526P
Description
Line Card Protection Switch for PDH, SONET or SDH Systems
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
1.ACS8526P.pdf
(74 pages)
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Address (hex):
Address (hex):
Address (hex):
Revision 4.01/June 2006 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Register Name
Bit No.
Bit No.
Bit No.
Bit 7
[7:0]
Bit 7
[7:6]
[5:0]
Bit 7
[7:5]
46
47
4B
cnfg_freq_divn
[7:0].
Description
divn_value[7:0].
cnfg_freq_divn
[13:8]
Description
Not used.
divn_value[13:8]
This register, in conjunction with Reg. 46
(cnfg_freq_divn) represents the integer value by
which to divide inputs that use the DivN pre-divider.
The DivN feature supports input frequencies up to a
maximum of 100 MHz; therefore, the maximum
value that should be written to this register is 30D3
hex (12499 dec). Use of higher DivN values may
result in unreliable behavior.
cnfg_registers_source_select
Description
Not used.
Bit 6
Bit 6
Bit 6
Bit 5
Bit 5
Bit 5
divn_value [7:0] (divide input frequency by n)
Description
Description
Description
DPLL1_DPLL2_
select
Bit 4
Bit 4
Bit 4
divn_value [13:8] (divide input frequency by n)
FINAL
Page 42
(R/W) Bits [7:0] of the division
factor for inputs using the DivN
feature.
(R/W) Bits [13:8] of the division
factor for inputs using the DivN
feature.
(R/W) Register to select the
source of many of the registers.
Bit Value
Bit Value
Bit Value
Bit 3
Bit 3
Bit 3
-
-
-
-
Value Description
See Reg. 47 (cnfg_freq_divn {13:8]) for details.
Value Description
-
The input frequency will be divided by the value in
this register plus 1. i.e. to divide by 8, program a
value of 7.
Value Description
-
Bit 2
Bit 2
Bit 2
ACS8526 LC/P LITE
Default Value
Default Value
Default Value
Bit 1
Bit 1
Bit 1
DATASHEET
www.semtech.com
1111 1111
0011 1111
0000 0000
Bit 0
Bit 0
Bit 0
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