IDT7200L IDT [Integrated Device Technology], IDT7200L Datasheet - Page 6

• Manufacturer Part Number: IDT7200L
• Description: CMOS ASYNCHRONOUS FIFO 256 x 9, 512 x 9, 1,024 x 9
• Manufacturer: IDT [Integrated Device Technology]

IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
SIGNAL DESCRIPTIONS
INPUTS:
DATA IN (D
CONTROLS:
RESET (
taken to a low state. During reset, both internal read and write
pointers are set to the first location. A reset is required after
power up before a write operation can take place. Both the
Read Enable (
the high state during the window shown in Figure 2, (i.e.,
t
until t
will be reset to high after Reset (
WRITE ENABLE (
Full Flag (
adhered to with respect to the rising edge of the Write Enable
(
independently of any on-going read operation.
the next write operation, the Half-Full Flag (
low and will remain set until the difference between the write
pointer and read pointer is less than or equal to one half of the
total memory of the device. The Half-Full Flag (
reset by the rising edge of the read operation.
inhibiting further write operations. Upon the completion of a
valid read operation, the Full Flag (
allowing a valid write to begin. When the FIFO is full, the
internal write pointer is blocked from
in
READ ENABLE (
Enable (
is accessed on a First-In/First-Out basis, independent of any
RSS
W
W
Data inputs for 9-bit wide data.
Reset is accomplished whenever the Reset (
A write cycle is initiated on the falling edge of this input if the
).
After half of the memory is filled and at the falling edge of
To prevent data overflow, the Full Flag (
A read cycle is initiated on the falling edge of the Read
before the rising edge of
will not affect the FIFO when it is full.
RSR
Data is stored in the RAM array sequentially and
R
RS RS
) provided the Empty Flag (
FF
after the rising edge of
)
0
) is not set. Data set-up and hold times must be
– D
OUTPUT
* Includes scope and jig capacitances.
R R
) and Write Enable (
8
R R
)
W W
PIN
)
TO
Figure 1. Output Load
)
680
or equivalent circuit
RS RS
5V
) and should not change
FF
RS RS
RS RS
1.1K
30pF*
W
EF
) will go high after t
W W
).
, so external changes
. Half-Full Flag (
) is not set. The data
) inputs must be in
2679 drw 03
HF
FF
) will be set to
) will go low,
RS
HF
) input is
) is then
RFF
HF HF
)
,
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
ongoing write operations. After Read Enable (
the Data Outputs (Q
condition until the next Read operation. When all data has
been read from the FIFO, the Empty Flag (
allowing the “final” read cycle but inhibiting further read
operations with the data outputs remaining in a high imped-
ance state. Once a valid write operation has been accom-
plished, the Empty Flag (
Read can then begin. When the FIFO is empty, the internal
read pointer is blocked from
affect the FIFO when it is empty.
FIRST LOAD/RETRANSMIT (
this pin is grounded to indicate that it is the first loaded (see
Operating Modes). In the Single Device Mode, this pin acts as
the restransmit input. The Single Device Mode is initiated by
grounding the Expansion In (
data when the Retransmit Enable control (
low. A retransmit operation will set the internal read pointer to
the first location and will not affect the write pointer. Read
Enable (
during retransmit. This feature is useful when less than 256/
512/1,024 writes are performed between resets. The retrans-
mit feature is not compatible with the Depth Expansion Mode
and will affect the Half-Full Flag (
relative locations of the read and write pointers.
EXPANSION IN (
grounded to indicate an operation in the single device mode.
Expansion In (
previous device in the Depth Expansion or Daisy Chain Mode.
OUTPUTS:
FULL FLAG (
operation, when the write pointer is one location less than the
read pointer, indicating that the device is full. If the read
pointer is not moved after Reset (
low after 256 writes for IDT7200, 512 writes for the IDT7201A
and 1,024 writes for the IDT7202A.
EMPTY FLAG (
operations, when the read pointer is equal to the write pointer,
indicating that the device is empty.
EXPANSION OUT/HALF-FULL FLAG (
when Expansion In (
indication of a half-full memory.
the next write operation, the Half-Full Flag (
and will remain set until the difference between the write
This is a dual-purpose input. In the Depth Expansion Mode,
The IDT7200/7201A/7202A can be made to retransmit
This input is a dual-purpose pin. Expansion In (
The Full Flag (
The Empty Flag (
This is a dual-purpose output. In the single device mode,
After half of the memory is filled and at the falling edge of
R
) and Write Enable (
FF FF
XI
EF EF
) is connected to Expansion Out (
)
XI XI
)
FF
)
0
XI
EF
) will go low, inhibiting further write
– Q
) is grounded, this output acts as an
) will go low, inhibiting further read
EF
8
) will go high after t
) will return to a high impedance
R
XI
so external changes in
FL FL
W
).
RS
) must be in the high state
/
RT RT
), the Full-Flag (
HF
)
), depending on the
XO
XO
RT
HF
/
HF HF
EF
) input is pulsed
WEF
) will be set low
R
)
) will go low,
) goes high,
and a valid
XO
FF
R
) will go
) of the
will not
XI
6
) is