MC14012BCPG ON Semiconductor, MC14012BCPG Datasheet

IC GATE NAND DUAL CMOS 14DIP

MC14012BCPG

Manufacturer Part Number
MC14012BCPG
Description
IC GATE NAND DUAL CMOS 14DIP
Manufacturer
ON Semiconductor
Series
4000Br
Datasheets

Specifications of MC14012BCPG

Logic Type
NAND Gate
Number Of Inputs
4
Number Of Circuits
2
Current - Output High, Low
3.4mA, 3.4mA
Voltage - Supply
3 V ~ 18 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Through Hole
Package / Case
14-DIP (0.300", 7.62mm)
Circuit Type
Low-Power Schottky
Current, Supply
30 μA
Function Type
2-Channels, 4-Inputs
Logic Function
NAND Gate
Package Type
PDIP-14
Special Features
Buffered Output
Temperature, Operating, Range
-55 to +125 °C
Voltage, Supply
3 to 18 VDC
Logic Family
4000
Logical Function
NAND
Number Of Elements
2
High Level Output Current
-4.2mA
Low Level Output Current
4.2mA
Propagation Delay Time
100ns
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Operating Temp Range
-55C to 125C
Number Of Outputs
1
Technology
CMOS
Mounting
Through Hole
Pin Count
14
Operating Temperature Classification
Military
Quiescent Current
1uA
Operating Supply Voltage (max)
18V
Operating Supply Voltage (min)
3V
Output Current
8.8mA
No. Of Inputs
4
Supply Voltage Range
3V To 18V
Logic Case Style
DIP
No. Of Pins
14
Operating Temperature Range
-55°C To +125°C
Filter Terminals
DIP
Rohs Compliant
Yes
Family Type
4000 CMOS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC14012BCPGOS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC14012BCPG
Manufacturer:
ON/安森美
Quantity:
20 000
MC14012B
Dual 4-Input NAND Gates
P-Channel and N-Channel enhancement mode devices in a single
monolithic structure (Complementary MOS). Their primary use is
where low power dissipation and/or high noise immunity is desired.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2007
Symbol
V
I
The MC14012B dual 4-input NAND gates are constructed with
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
in
in
Schottky TTL Load Over the Rated Temperature Range
Suffix Devices
Supply Voltage Range = 3.0 Vdc to 18 Vdc
All Outputs Buffered
Capable of Driving Two Low-Power TTL Loads or One Low-Power
Double Diode Protection on All Inputs
Pin-for-Pin Replacements for Corresponding CD4000 Series B
Pb-Free Packages are Available
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
stg
DD
D
A
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8-Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
- 0.5 to V
SS
- 0.5 to +18.0
- 55 to +125
- 65 to +150
out
)
Value
± 10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
A
WL, L
YY, Y
WW, W
G
ORDERING INFORMATION
CASE 751A
SOEIAJ-14
CASE 646
CASE 965
P SUFFIX
D SUFFIX
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
F SUFFIX
SOIC-14
PDIP-14
Publication Order Number:
14
1
14
14
1
1
DIAGRAMS
MC14012BCP
AWLYYWWG
MARKING
MC14012B
MC14012B/D
AWLYWW
ALYWG
14012BG

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MC14012BCPG Summary of contents

Page 1

MC14012B Dual 4-Input NAND Gates The MC14012B dual 4-input NAND gates are constructed with P-Channel and N-Channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low power dissipation and/or high noise immunity is ...

Page 2

... CONNECTION Figure 1. Pin Assignment ORDERING INFORMATION Device MC14012BCP MC14012BCPG MC14012BD MC14012BDG MC14012BDR2 MC14012BDR2G MC14012BFEL MC14012BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. MC14012B MC14012B Dual 4-Input NAND Gate ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS (Note 5 Î Î Î ...

Page 5

-T- SEATING PLANE 0.13 (0.005) MC14012B PACKAGE DIMENSIONS PDIP-14 CASE 646-06 ISSUE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...

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