IDT72251 IDT [Integrated Device Technology], IDT72251 Datasheet - Page 14
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IDT72251
Manufacturer Part Number
IDT72251
Description
CMOS SyncFIFOO 8192 X 9
Manufacturer
IDT [Integrated Device Technology]
Datasheet
1.IDT72251.pdf
(17 pages)
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IDT72251 CMOS SyncFIFO
8192 x 9
(If Applicable)
NOTES:
1. PAE offset = n.
2. t
3. If a read is performed on this rising edge of the read clock, there will be Empty + (n-1) words in the FIFO when
edge of WCLK and the rising edge of RCLK is less than t
REN1
REN2
WCLK
WEN1
WEN2
SKEW2
RCLK
PAE
,
is the minimum time between a rising WCLK edge and a rising RCLK edge for
n words in FIFO
t
CLKH
t
t
t
ENS
ENS
SKEW2
t
CLKL
(2)
Figure 11. Programmable Empty Flag Timing
t
t
ENH
ENH
SKEW2
t
PAE
, then
(1)
PAE
5.14
may not change state until the next RCLK rising edge.
PAE
to change during that clock cycle. If the time between the rising
n+1 words in FIFO
t
ENS
t
ENH
PAE
COMMERCIAL TEMPERATURE RANGES
goes LOW.
(3)
t
PAE
2655 drw 13
14