R1610I RDC [RDC Semiconductor], R1610I Datasheet - Page 2

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R1610I

Manufacturer Part Number
R1610I
Description
16-BIT RISC MICROCONTROLLER
Manufacturer
RDC [RDC Semiconductor]
Datasheet
R
l CPU Core
- RDC’s proprietary RISC architecture
- Five-stage pipeline architecture
- Operation frequency: 100MHz
- Supports an 8K-byte uniform cache
- Supports CPU ID
- Software is compatible with the 80C186
l Bus interface
- 8-bit or 16-bit external bus dynamic access
- Supports a glue-less and simplified 16-bit PCMCIA
l ROM/RAM/SDRAM Controller and Addressing
- Supports 16-bit data bus width
- 16-bit SDRAM control Interface
- 1M addressing space/A[19:0]
- 64K-byte I/O space
- With 8-bit or 16-bit boot ROM bus size
- Supports an independent data/address bus for the
l Two Independent DMA Channels
l Interrupt Controller
- Provides 5 maskable external interrupts and 1
Specifications subject to change without notice, contact your sales representatives for the most update information.
R
non-maskable external interrupt
microprocessor
bus interface
external I/O device
1. Features
Space
D
D
C
C
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R
R
I
I
S
S
C
C
D
D
S
S
P
P
C
C
o
o
m
m
m
m
u
u
n
n
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i
c
c
a
a
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l General Programmable I/O
- Supports 18 PIO pins
- Programmable chip-select logic for memory or I/O
l Counter/Timers
- 3 independent 16-bit timers
- 1 independent programmable watchdog timer
l High Performance UART Ports
- Supports two 16550 UART serial channels with
- Programmable wait-state generators
l Fast Ethernet MAC Ports
- 1-port Fast Ethernet MAC with MII interface
l Operating Voltage Range
- Core voltage: 2.5V ± 5%
- I/O voltage: 3.3V ± 10%
l Package Information
- 128-pin PQFP
l A Product of Industrial Spec
- Operation frequency: 75MHz
- Ambient temperature: -40 ~ 80℃
l A Green Product
bus cycle decoder
16-byte FIFO and hardware flow control
16-BIT RISC MICROCONTROLLER
REV 1.0 Nov.25 2005
R1610I

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