DS3510T+TR MAXIM [Maxim Integrated Products], DS3510T+TR Datasheet

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DS3510T+TR

Manufacturer Part Number
DS3510T+TR
Description
I2C Gamma and VCOM Buffer with EEPROM
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
The DS3510 is a programmable gamma and V
age generator which supports both real-time updating
as well as multibyte storage of gamma/V
chip EEPROM memory. An independent 8-bit DAC, two
8-bit data registers, and 4 bytes of EEPROM memory
are provided for each individually addressable gamma
or V
are integrated on-chip, providing rail-to-rail, low-power
(400µA/gamma channel) operation. The V
features a high-current drive (> 250mA peak) and a fast-
settling buffer amplifier optimized to drive the V
node of a wide range of TFT-LCD panels.
Programming occurs through an I
interface. Interface performance and flexibility are
enhanced by a pair of independently loaded data reg-
isters per channel, as well as support for I
to 400kHz. The multitable EEPROM memory enables a
rich variety of display system enhancements, including
support for temperature or light-level-dependent
gamma tables, enabling of factory or field automated
display adjustment, and support for backlight dimming
algorithms to reduce system power. Upon power-up
and depending on mode, DAC data is selected from
EEPROM by the S0/S1 pads or from a fixed memory
address.
Rev 0; 2/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
SDA, SCL
S1/ S0
COM
LD
A0
TFT-LCD Gamma and V
Adaptive Gamma and V
Time by I
S0/S1 Pads)
Industrial Process Control
channel. High-performance buffer amplifiers
I
2
2
INTERFACE
C Gamma and V
C, Select EEPROM Through I
LOGIC
________________________________________________________________ Maxim Integrated Products
I
2
C
General Description
COM
COM
LATCH A
2
Applications
Buffer
Adjustment (Real-
C-compatible serial
COM
2
COM
C speeds up
Gamma or V
data in on-
2
COM
IN
ADDRESS
C or
channel
EEPROM
COM
volt-
COM
OUT
o 8-Bit Gamma Buffers, 10 Channels
o 8-Bit V
o 4 EEPROM Bytes per Channel
o Low-Power 400µA/ch Gamma Buffers
o I
o Flexible Control from I
o 9.0V to 15.0V Analog Supply
o 2.7V to 5.5V Digital Supply
o 48-Pin Package (TQFN 7mm x 7mm)
+Denotes a lead-free package.
T&R = Tape and reel.
*EP = Exposed pad.
Pin Configuration and Typical Operating Circuit appear at
end of data sheet.
DS3510T+
DS3510T+T&R
COM
2
C-Compatible Serial Interface
PART
Buffer with EEPROM
MUX
COM
Channel Functional Diagram
Buffer, 1 Channel
LATCH B
-45°C to +95°C
-45°C to +95°C
TEMP RANGE
Ordering Information
2
C or Pins
8-BIT
DAC
PIN-PACKAGE
48 TQFN-EP*
48 TQFN-EP*
Features
V
OUT
1

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DS3510T+TR Summary of contents

Page 1

Rev 0; 2/ Gamma and V General Description The DS3510 is a programmable gamma and V age generator which supports both real-time updating as well as multibyte storage of gamma/V chip EEPROM memory. An independent 8-bit DAC, ...

Page 2

I C Gamma and V ABSOLUTE MAXIMUM RATINGS Voltage on V Relative to GND ............................-0.5V to +16V DD Voltage on VRL, VRH, GHH, GHM, GLM, GLL Relative to GND........-0. 0.5V), not to exceed 16V DD Voltage ...

Page 3

I C Gamma and V INPUT ELECTRICAL CHARACTERISTICS (continued +2.7V to +5.5V -45°C to +95°C, unless otherwise noted PARAMETER SYMBOL R Tolerance TOTAL Input Resistance (GHH, GHM, GLM, GLL) Input Resistance Tolerance OUTPUT ...

Page 4

I C Gamma and ELECTRICAL CHARACTERISTICS (See Figure +2.7V to +5.5V -45°C to +95°C, timing referenced PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between STOP ...

Page 5

I C Gamma and V NONVOLATILE MEMORY CHARACTERISTICS ( +2.7V to +5.5V.) PARAMETER SYMBOL EEPROM Write Cycles EEPROM Write Cycles Note 1: All voltages are referenced to ground. Currents entering the IC are specified positive and currents ...

Page 6

I C Gamma and S0/ GM1–10 Figure 2. GM1–10 Settling Timing Diagram V S0/ GM1–GM10 Figure 3. ...

Page 7

I C Gamma and +25°C, unless otherwise noted vs 180 +25°C 160 +95°C 140 120 -40°C 100 80 60 2.7 3.2 3.7 4.2 4.7 5 vs. V ...

Page 8

I C Gamma and V NAME PIN TYPE V 1, 19, 20, 24 Power DD 2, 38, 40, GND Power 42 Input S1 4 Input S0 5 SCL 6 Input SDA 7 Input/Output ...

Page 9

I C Gamma and V BANKS GM10 BANK A DS3510 GM10 BANK B GM10 BANK C GM10 BANK D S0/S1 PINS S0/S1 BITS COMP BANKS GM6 BANK A GM6 BANK B GM6 BANK C GM6 BANK ...

Page 10

I C Gamma and V Detailed Description The DS3510 operates in one of three modes which determine how the V and gamma DACs are con- COM trolled/updated. The first two modes allow “banked” control of the 10 gamma channels ...

Page 11

I C Gamma and V Table 3. DAC Voltage/Data Relationship for Selected Codes SETTING V OUTPUT VOLTAGE COM (HEX) 00h VRL 01h VRL + (1/255) x (VRH - VRL) 02h VRL + (2/255) x (VRH - VRL) 03h VRL ...

Page 12

I C Gamma and V Memory Organization Memory Description The list of registers/memory contained in the DS3510 is shown in the Memory Map. Also shown for each of the registers is the memory type and accessibility, as well as ...

Page 13

I C Gamma and V SOFT S0/S1 50h: SOFT S1/S0 Bits FACTORY DEFAULT MEMORY TYPE 50h x x bit7 bit7:2 Reserved These bits are used when in SOFT S0/S1 (bit) Controlled Bank Updating Mode (MODE1 = 0, MODE0 = ...

Page 14

I C Gamma and V CONTROL REGISTER 60h: Control Register (CR) FACTORY DEFAULT MEMORY TYPE 60h x x bit7 bit7:6 Reserved V and Gamma Bias Current Control Bits: COM 00 = 150% bit5 100% (default ...

Page 15

I C Gamma and V Byte write: A byte write consists of 8 bits of information transferred from the master to the slave (most signifi- cant bit first) plus a 1-bit acknowledgment from the slave to the master. The ...

Page 16

I C Gamma and V 2 TYPICAL I C WRITE TRANSACTION MSB LSB START R/W READ/ SLAVE WRITE ADDRESS* 2 EXAMPLE I C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND) C0h A) ...

Page 17

I C Gamma and V Applications Information Power-Supply Decoupling To achieve the best results when using the DS3510, decouple all the power-supply pins (V 0.01µF or 0.1µF capacitor. Use a high-quality ceramic surface-mount capacitor if possible. Surface-mount com- ponents ...

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