SDA5252 SIEMENS [Siemens Semiconductor Group], SDA5252 Datasheet - Page 77

• Manufacturer Part Number: SDA5252
• Description: TVTEXT 8-Bit Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Power Control Register PCON
Power Control Register
Default after reset: 000xxx00
PDS
IDLS
PDE
IDLE
SMOD
Entering the idle mode is done by two consecutive instructions immediately following
each other. The first instruction has to set bit IDLE (PCON.0) and must not set bit IDLS
(PCON.5). The following instruction has to set bit IDLS (PCON.5) and must not set bit
IDLE (PCON.0). Bits IDLE and IDLS will automatically be cleared after having been set.
This double-instruction sequence is implemented to minimize the chance of
unintentionally entering the idle mode. The following instruction sequence may serve as
an example:
ORL
ORL
The instruction that sets bit IDLS is the last instruction executed before going into idle
mode.
The idle mode can be terminated by activation of any enabled interrupt (or a hardware
reset). The CPU-operation is resumed, the interrupt will be serviced and the next
instruction to be executed after RETI-instruction will be the one following the instruction
that set the bit IDLS. The port state and the contents of SFRs are held during idle mode.
Entering the power-down mode is done by two consecutive instructions immediately
following each other. The first instruction has to set bit PDE (PCON.1) and must not set
bit PDS (PCON.6). The following instruction has to set bit PDS (PCON.6) and must not
set bit PDE (PCON.1). Bits PDE and PDS will automatically be cleared after having been
set. This double-instruction sequence is implemented to minimize the chance of
Semiconductor Group
SMOD
(MSB)
PCON,#00000001
PCON,#00100000
PDS
IDLS
Power-down start bit. The instruction that sets the PDS-flag is
the last instruction before entering the power down mode.
IDLE start bit. The instruction that sets the PDS-flag is the last
instruction before entering the idle mode.
Power-down enable bit. When set, starting the power-down
mode is enabled.
Idle enable bit. When set, starting the idle mode is enabled.
Baud rate control for serial interface; if set, the baud rate is
doubled.
B
B
Set bit IDLE, bit IDLS must not be set.
Set bit IDLS, bit IDLE must not be set.
–
PCON
77
–
–
SFR-Address 87
PDE
SDA 525x
1998-04-08
(LSB)
IDLE
H