ATSAM3U ATMEL [ATMEL Corporation], ATSAM3U Datasheet - Page 3

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ATSAM3U

Manufacturer Part Number
ATSAM3U
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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1.2.2.4
1.2.3
1.2.3.1
1.2.3.2
1.2.4
1.2.4.1
6483A–ATARM–04-Aug-09
Serial Wire and JTAG Debug Port (SWJ-DP)
Supply Controller (SUPC)
ADC12B: Current Consumption in Backup Mode on VDDANA
SWJ-DP: Asynchronous Trace (TRACESWO)
SUPC: Bad behavior of SMS and SMOS bit in SUPC_SR in Sample mode
SWJ-DP: Processor Reset
Configure the ADC in Off Mode in the ADC Extended Mode Register (ADC_EMR) after reset.
This issue will be fixed in the next revision.
In Backup mode, the ADC is not in Off Mode, but in Standby Mode (even if the software has pre-
viously put it in Off mode) leading to current consumption on VDDANA (1.4 mA instead of
0.1µA).
None.
This issue will be fixed in the next revision.
Asynchronous Trace (TRACESWO) does not work.
None.
This issue will be fixed in the next revision.
A processor reset also asserts SWJ-DP. Connection issue in debug mode.
Workaround applied by Segger on SAM-ICE Firmware.
This issue will be fixed in the next revision.
When the Supply Monitor is configured in sample mode (SMSMPL > 1), the SMS and SMOS bits
of the supply controller status register (SUPC_SR) might not be reliable when polling SUPC_SR.
Use the Supply Monitor Interrupt instead of polling the status register. In the interrupt handler,
set the Supply Monitor in Continuos mode to check the bits SMA and SMOS.
This issue will be fixed in the next revision.
Problem Fix
Workaround
Problem Fix
Workaround
Problem Fix
Workaround
Problem Fix
Workaround
Problem Fix
ATSAM3U Errata
3

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