gc41c501g1-so24i CORERIVER Semiconductor, gc41c501g1-so24i Datasheet - Page 40

• Manufacturer Part Number: gc41c501g1-so24i
• Description: 4-bit Microcontrollers With Reduced 8051 Architecture
• Manufacturer: CORERIVER Semiconductor

CJLE A, @DP, rel
Appendix A : Instruction Set (5/19)
Binary Code
Description
Carry Flag
Operation
CMP_EQ:
CMP_LE:
Example
Cycles
Bytes
Compares the contents of ACC and the indirect
memory, and branches if the value in ACC is
less than or equal to that in memory.
The branch destination is computed by adding
the signed relative-displacement in the
second byte of the instruction to the PC, after
incrementing the PC to the start of the next
instruction. The contents of both operands are
not affected by comparison.
The carry flag is set if the contents are equal.
(PC) ← (PC) + 2
IF (A)
IF (A) = M[DP] THEN (C) ← 1
2
2
; Assumes M[DP] contains 11, ACC 5.
CJLE A, @DP, CMP_LE; Branches to CMP_LE
......
JC CMP_EQ
......
......
1001
≤
M[DP] THEN (PC) ← (PC) + rel
0011
ELSE (C) ← 0.
rrrr
; IF (A) < M[DP]
; IF (A) = M[DP]
;
; IF (A) > M[DP]
rrrr
CJNE @DP, #data, rel
Binary Code
Description
Carry Flag
Operation
CMP_NE:
CMP_LT:
Example
Cycles
Bytes
Compares the contents of the indirect memory
and data in four low-order bits of opcode, and
branches if their values are not equal.
The branch destination is computed by adding
the signed relative-displacement in the
second byte of the instruction to the PC, after
incrementing the PC to the start of the next
instruction. The contents of indirect memory is
not affected.
The carry flag is set if the unsigned integer
value of M[DP] is less than the unsigned
integer value of the data; otherwise, the carry
is cleared.
(PC) ← (PC) + 2
IF M[DP]
IF M[DP] < #data THEN (C) ← 1
2
2
; Assumes M[DP] contains 2.
CJNE @DP, #8, CMP_NE; Branches to CMP_NE
......
JC CMP_LT
......
......
1011
ATOM1.0 Family
≠
dddd
#data THEN (PC) ← (PC) + rel
ELSE (C) ← 0.
rrrr
Preliminary
; Branches to CMP_LT
; IF M[DP] = 8
; IF M[DP] > 8
; IF M[DP] < 8
rrrr
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