gc41c501g2-so24i CORERIVER Semiconductor, gc41c501g2-so24i Datasheet - Page 41
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gc41c501g2-so24i
Manufacturer Part Number
gc41c501g2-so24i
Description
4-bit Microcontrollers With Reduced 8051 Architecture
Manufacturer
CORERIVER Semiconductor
Datasheet
1.GC41C501G2-SO24I.pdf
(55 pages)
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CPL A
DEC @DP
Appendix A : Instruction Set (9/19)
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Complements the contents of ACC.
(A) ← ~(A)
Not affected.
1
1
MOV A, P0
CPL A
Decrements the value of data memory
addressed indirectly by DPTR.
M[DP] ← M[DP] - 1
Not affected.
1
1
DEC @DP
0000
0000
1010
0111
; (A) ← P0
; ACC contains 1's
; complement of P0
DEC DPTR
DEC A
Binary Code
Binary Code
Description
Description
Carry Flag
Carry Flag
Operation
Operation
Example
Example
Cycles
Cycles
Bytes
Bytes
Decrements the contents of ACC.
This is the same as "ADD A, #15".
Carry is cleared when the borrow occurs;
(A) ← (A) + 15
IF (A) = 0 THEN C ← 0
1
1
DEC A
Decrements the data pointer.
(DP) ← (DP) - 1
Not affected.
1
1
; Assumes DPTR contains 0.
DEC DPTR
DEC DP
otherwise, carry is set.
0001
0000
ATOM1.2 Family
1111
0101
ELSE C ← 1.
; By underflow, all bits
; This is also valid.
; of DPH and DPL are set.
Preliminary
[41]
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