fx469 Consumer Microcircuits Limited, fx469 Datasheet - Page 2

• Manufacturer Part Number: fx469
• Description: 1200/2400/4800 Baud Ffsk Modem
• Manufacturer: Consumer Microcircuits Limited

Pin Number
DW
10
1
2
3
4
5
6
7
8
9
FX469
LG/LS
10
11
12
1
2
3
5
7
8
9
J/P6
10
11
1
2
3
5
6
7
8
9
Function
Xtal/Clock : The input to the on-chip inverter, for use with either a 1.008MHz or a 4.032MHz
Xtal or external clock. Clock frequency selection is by the “Clock Rate” input pin. The
selection of this frequency will affect the operational Data Rate of this device. Refer to Baud
Selection information on the next page. Operation of any CML microcircuit without a Xtal or
clock input may cause device damage. To minimise damage in the event of a Xtal/drive
failure. it is recommended that the power rail (V
(resistor or fast-reaction fuse).
XtalN : Output of the on-chip inverter.
Tx Sync O/P : A squarewave, produced on-chip, to synchronize the input of logic data and
transmission of the FFSK signal (See Figure 4).
Tx Signal O/P : When the transmitter is enabled, this pin outputs the (140-step pseudo
sinewave) FFSK signal (See Figure 4).
With the transmitter disabled, this output is set to a high-impedance state.
Tx Data I/P : Serial logic data to be transmitted is input to this pin.
Tx EnableN : A logic ‘0’ will enable the transmitter (See Figure 4). A logic ‘1’ at this input will
put the transmitter into powersave whilst forcing “Tx Sync Out” to a logic ‘1’ and “Tx Signal
Out” to a high-impedance state. This pin is internally pulled to V
Bandpass O/P : The output of the Rx Bandpass Filter. This output impedance is typically
10kW and may require buffering prior to use.
Rx Enable : The control of the Rx function. The control of other outputs is given below.
V
should be decoupled to V
This bias voltage is maintained under all powersave conditions.
V
Rx Enable
BIAS
SS
: Negative supply rail (GND).
“1”
“0”
: The output of the on-chip analogue bias circuitry. Held internally at V
=
=
=
Rx Function
Powersave
Enabled
SS
by a capacitor (C
2
Clock Data O/P
Enabled
“0”
2
). (See Figure 2.
DD
) is fitted with a current limiting device
Carrier Detect
Enabled
DD
“0”
.
DD
/2, this pin
Rx Sync Out
Enabled
1” or “0”