ST72324 STMICROELECTRONICS [STMicroelectronics], ST72324 Datasheet - Page 58
ST72324
Manufacturer Part Number
ST72324
Description
5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.ST72324.pdf
(163 pages)
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ST72324
MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK (Cont’d)
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software
reading the MCCSR register. It indicates when set
that the main oscillator has reached the selected
elapsed time (TB1:0).
0: Timeout not reached
1: Timeout reached
CAUTION: The BRES and BSET instructions
must not be used on the MCCSR register to avoid
unintentionally clearing the OIF bit.
Table 15. Main Clock Controller Register Map and Reset Values
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1
Address
002Dh
(Hex.)
002Bh
002Ch
SICSR
Reset Value
MCCSR
Reset Value
MCCBCR
Reset Value
Register
Label
MCO
7
0
0
0
AVDIE
CP1
6
0
0
0
AVDF
CP0
5
0
0
0
MCC BEEP CONTROL REGISTER (MCCBCR)
Read/Write
Reset Value: 0000 0000 (00h)
Bit 7:2 = Reserved, must be kept cleared.
Bit 1:0 = BC[1:0] Beep control
These 2 bits select the PF1 pin beep capability.
The beep output signal is available in ACTIVE-
HALT mode but has to be disabled to reduce the
consumption.
LVDRF
BC1
7
0
SMS
0
0
1
1
4
x
0
0
0
BC0
0
1
0
1
TB1
3
0
0
0
0
Beep mode with f
0
~500-Hz
~1-KHz
~2-KHz
TB0
2
0
0
0
0
Off
BC1
OIE
0
~50% duty cycle
1
0
0
0
OSC2
Beep signal
BC1
Output
=8MHz
WDGRF
BC0
OIF
0
x
0
0
BC0
0