mx26l6420 Macronix International Co., mx26l6420 Datasheet - Page 10

• Manufacturer Part Number: mx26l6420
• Description: 64m-bit [4m X 16] Cmos Multiple-time-programmable Eprom
• Manufacturer: Macronix International Co.

SOFTWARE COMMAND DEFINTIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
in the improper sequence will reset the device to the
read mode. Table 4 defines the valid register command
sequences. Either of the two reset command sequences
TABLE4. MX26L6420 COMMAND DEFINITIONS
Legend:
X=Don't care
RA=Address of the memory location to be read.
RD=Data read from location RA during read operation.
PA=Address of the memory location to be programmed.
Addresses are latched on the falling edge of the WE or
CE pulse.
P/N:PM0823
Notes:
1.See Table 1 for descriptions of bus operations.
2.All values are in hexadecimal.
3.Except when reading array or autoselect data, all bus cycles are write operation.
4.Address bits are don't care for unlock and command cycles, except when PA is required.
5.No unlock or command cycles required when device is in read mode.
6.The Reset command is required to return to the read mode when the device is in the autoselect mode or if Q5 goes
7.The fourth cycle of the autoselect command sequence is a read cycle.
8.In the third and fourth cycles of the command sequence, set A21=0.
8.Command is valid when device is ready to read array data or when device is in autoselect mode.
9.The data is 88h for factory locked and 08h for non-factory locked.
Command
Read(Note 5)
Reset(Note 6)
Autoselect(Note 7)
Enter Secured Silicon
Sector
Exit Secured Silicon
Sector
Porgram
Chip Erase
Device ID
Secured Sector
Factory Protect
high.
Manufacturer ID
Cycle
Bus
1
4
4
3
4
6
1
4
4
First Bus
Cycle
Addr
RA
XXX
555
555
555
555
555
555
555
Data Addr
RD
F0
AA
AA
AA
AA
AA
AA
AA
Second Bus Third Bus
Cycle
2AA
2AA
2AA
2AA
2AA
2AA
2AA
Data Addr
55
55
55
55
55
55
55
10
will reset the device(when applicable).
All addresses are latched on the falling edge of WE or
CE, whichever happens later. All data are latched on ris-
ing edge of WE or CE, whichever happens first.
PD=Data to be programmed at location PA. Data is
latched on the rising edge of WE or CE pulse.
Cycle
555
555
555
555
555
555
555
88
Data Addr Data
90
90
90
90
A0
80
Fourth Bus
Cycle
X00
X01
x03
xxx
PA
555
MX26L6420
C2
22FC
see
Note9
00
PD
AA
Fifth Bus
Cycle
Addr Data Addr Data
2AA
REV. 0.5, JAN. 29, 2002
55
Sixth Bus
Cycle
555
10