ST72F321 STMICROELECTRONICS [STMicroelectronics], ST72F321 Datasheet - Page 12

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ST72F321

Manufacturer Part Number
ST72F321
Description
64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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ST72321
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up
column (wpu) is merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input,
else the configuration is floating interrupt input.
2. In the open drain output column, “T” defines a true open drain I/O (P-Buffer and protection diode to V
are not implemented). See See “I/O PORTS” on page 46. and
ISTICS
3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscil-
lator; see
more details.
4. On the chip, each I/O port may have up to 8 pads. Pads that are not bonded to external pins are in input
pull-up configuration after reset. The configuration of these pads must be kept at reset state to avoid add-
ed current consumption.
12/189
51 36 PA6 (HS)/SDAI
52 37 PA7 (HS)/SCLI
53 38 V
54 39 RESET
55
56
57 40 V
58 41 OSC2
59 42 OSC1
60 43 V
61 44 PE0/TDO
62
63
64
Pin n°
1
-
-
-
for more details.
EVD
TLI
PE1/RDI
PE2 (Flash device)
PE2 (ROM device)
PE3
Section 1 INTRODUCTION
PP
SS_2
DD_2
/ ICCSEL
3)
3)
Pin Name
I/O C
I/O C
I/O C
I/O
I/O C
I/O C
I/O C
I/O C
S
S
I
I
I
C
Level
T
T
T
T
T
T
T
T
and
HS
HS
Section 12.5 CLOCK AND TIMING CHARACTERISTICS
X
X
X
X
X
X
X
X
X
X
Input
X
Port
Output
Section 12.8 I/O PORT PIN CHARACTER-
X
X
X
X
T
T
X
X
X
X
function
Port A6
Port A7
Must be tied low. In flash programming
mode, this pin acts as the programming
voltage input V
for more details. High voltage must not
be applied to ROM devices
Top priority non maskable interrupt.
External voltage detector
Top level interrupt input pin
Digital Ground Voltage
Resonator oscillator inverter output
External clock input or Resonator oscil-
lator inverter input
Digital Main Supply Voltage
Port E0
Port E1
Port E2
Caution: In Flash devices this port is al-
ways input with weak pull-up.
Port E2
Caution: In ROM devices, no weak
pull-up present on this port.
In TQFP44 this pin is not connected to
an internal pull-up like other unbonded
pins (See note 4). It is recommended to
configure it as output push pull to avoid
added current consumption.
Port E3
reset)
(after
Main
SCI Transmit Data Out
SCI Receive Data In
I
I
2
2
C Data
C Clock
Alternate function
PP
. See
1)
1)
Section 12.9.2
DD
for

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