lh5p8128 Sharp Microelectronics of the Americas, lh5p8128 Datasheet
lh5p8128
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lh5p8128 Summary of contents
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... LH5P8128 with little or no changes. The advantage is the cost savings realized with the lower cost PSRAM. The LH5P8128 PSRAM has the ability to fill the gap between DRAM and SRAM by offering low cost, low power standby and a simple interface. CMOS 1M (128K ...
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... PIN NAME Address input 0 16 R/W Read/Write input OE Output Enable Input 2 CMOS 1M (128K COLUMN DECODER SENSE AMPS SELECTOR ROW MEMORY DECODER ARRAY REFRESH REFRESH CONTROLLER TIMER Figure 3. LH5P8128 Block Diagram SIGNAL RFSH I Pseudo-Static RAM 16 GND GENERATOR BB DATA 13 I/O I/O 0 ...
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... RC I CC2 I CC3 except on test pins OUT CC I Output in high- LO impedance state OUT OUT LH5P8128 NOTE 1 UNIT UNIT MIN. MAX. UNIT 104 0 0.2 6 ...
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... RFD t 30 8,000 30 FAP 8,000 8,000 FAS t 140 160 FRS INPUT OUTPUT or at the positive Pseudo-Static RAM LH5P8128-10 UNIT MAX. MIN. MAX. 160 ns 235 ns 10,000 100 10,000 100 ...
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... V IL NOTE: Operation possible using only ADDRESS INPUT t RCS t OEA t CEA t OLZ t CLZ FRS RHC ( fixing CE to LOW (CE to HIGH Figure 5. Read Cycle LH5P8128 t RCH t OHZ t CHZ VALID-DATA OUTPUT t RFD 5P8128-4 5 ...
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... LH5P8128 R I RFSH V IL NOTE: Operation possible using only ADDRESS INPUT t OES t WCH FRS RHC ...
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... ADDRESS INPUT t WCH t t CLZ OHZ FRS RHC ( fixing CE to LOW (CE to HIGH Figure 7. Write Cycle 2 (OE Clock) LH5P8128 WCS DSW DHW t t DSC DHC VALID DATA INPUT t t WHZ OLZ t t WLZ ...
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... LH5P8128 R I OUT RFSH V IL NOTE: Operation possible using only ADDRESS INPUT t WCH t CLZ FRS ...
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... RCS t OEA t CEA t OLZ t CLZ DATA OUTPUT FRS RHC ( fixing CE to LOW (CE to HIGH Figure 9. Read-Modify-Write Cycle LH5P8128 t WCS DSW DHW t t DSC DHC DATA INPUT t t WHZ CHZ t t OHZ WLZ t RFD 5P8128-8 ...
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... LH5P8128 R I RFSH V IL NOTE Don't Care RFSH V IL ...
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... Pseudo-Static RAM RFSH I NOTE: OE, R/ Don't Care RFD FAP FP HIGH-Z Figure 12. Auto Refresh Cycle LH5P8128 RHC t t FAP FP 5P8128-11 11 ...
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... LH5P8128 PACKAGE DIAGRAMS 32DIP (DIP032-P-0600 41.30 [1.626] 40.70 [1.602] 2.54 [0.100] 0.60 [0.024] TYP. 0.40 [0.016] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 32SOP (SOP032-P-0525) 0.50 [0.020] 0.30 [0.012 20.80 [0.819] 20.40 [0.803] MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT 12 CMOS 1M (128K 17 13.45 [0.530] 12.95 [0.510] 16 4.50 [0.177] 4.00 [0.157] 5 ...
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... MAXIMUM LIMIT DIMENSIONS IN MM [INCHES] MINIMUM LIMIT ORDERING INFORMATION LH5P8128 Device Type Package Speed Example: LH5P8128N-60 (CMOS 1M (128K x 8) Pseudo-Static RAM, 60 ns, 32-pin, 525-mil SOP) 0.50 [0.020] TYP. 17 20.30 [0.799] 18.60 [0.732] 18.20 [0.717] 19.70 [0.776] 16 0.15 [0.006] 1.10 [0.043] 0.90 [0.035] 1.20 [0.047] MAX. 0.20 [0.008] 0.425 [0.017] ...