s3c2443 Samsung Semiconductor, Inc., s3c2443 Datasheet
s3c2443
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s3c2443 Summary of contents
Page 1
... RISC microprocessor, to provide hand-held devices and general applications with cost-effective, low- power, and high performance micro- controller solution in a small form-factor. The S3C2443X is developed using 0.13 μm CMOS standard cell. In addition, it adopts a new bus architecture called Advanced Microcontroller Bus Architecture (AMBA). ...
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... S3C2443 Functional Block Diagram UART 4ch UART 4ch SPI 2ch SPI 2ch I2C I2C I2S I2S AC97 AC97 SD/MMC 2ch SD/MMC 2ch GPIO GPIO RTC RTC WDT WDT PWM Timer PWM Timer ADC ADC Power Power Management Management Clock CONT. Clock CONT. ...
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... S3C2443 Product Details ARM Core ARM920T 32-bit RISC CPU Integrated system for hand-held devices and general embedded applications 16/32-Bit RISC architecture and powerful instruction set Enhanced ARM architecture MMU which supports WinCE, Symbian, Linux and Palm OS Instruction cache, data cache, write buffer and ...
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... S3C2443 Display Controller STN LCD interface Supports 3 types of LCD panels: 4-bit dual scan, 4- bit single scan, and 8-bit single scan display type Supports the monochrome, 4 gray levels, and 16 gray levels Supports 256 colors and 4096 colors for color STN LCD panel Supports multiple screen size • ...
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... S3C2443 SPI Interface 2-ch Serial Peripheral Interface Protocol version 2.11 compatible (1-ch for HS-SPI) 16 byte TX DMA-based or interrupt-based operation I2C Bus Interface 1-ch Multi-Master IIC-Bus Serial, 8-bit oriented and bi-directional data transfers can be made 100 Kbit/s in the standard mode Up to 400 Kbit/s in the fast mode MMC/SD/SDIO/HS-MMC Multimedia Card Protocol version 4 ...
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... S3C2443 Real Time Clock (RTC) Full clock feature: msec, second, minute, hour, date, day, month, and year 32.768 KHz operation Alarm interrupt Time tick interrupt DMA 6-ch DMA controller Supports memory to memory memory, memory to IO, and transfers Burst transfer mode to enhance the transfer ...