k8d6316u Samsung Semiconductor, Inc., k8d6316u Datasheet

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k8d6316u

Manufacturer Part Number
k8d6316u
Description
64m Bit 8m X8/4m X16 Dual Bank Nor Flash Memory
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K8D6x16UTM / K8D6x16UBM
Document Title
Revision History
64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory
Revision No.
0.0
1.0
1.1
1.2
1.3
1.4
1.5
History
Initial Draft
Final Specification
Revised
- Release the stand-by current from typ. 5uA(max. 18uA) to typ.
Not support 48TSOP1 Package
Not support 16M/16M BANK partition
Support 48TSOP1 Package
Support 48TSOP1 Lead Free Package
Support 48FBGA Leaded/Lead Free Package
10uA(max. 30uA).
1
Draft Date
January 10, 2002
May 22, 2002
June 18, 2003
November 18, 2003
July 22, 2004
September 16,
2004
March 16, 2005
FLASH MEMORY
Revision 1.5
Remark
Preliminary
Final
March 2005

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k8d6316u Summary of contents

Page 1

K8D6x16UTM / K8D6x16UBM Document Title 64M Bit (8M x8/4M x16) Dual Bank NOR Flash Memory Revision History Revision No. History 0.0 Initial Draft 1.0 Final Specification 1.1 Revised - Release the stand-by current from typ. 5uA(max. 18uA) to typ. 10uA(max. ...

Page 2

... Please refer to the package dimension. SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K8D6316U featuring single 3.0V power supply 64Mbit NOR-type Flash Memory organized as 8Mx8 or 4M x16. The memory architecture of the device is designed to divide its memory arrays into 135 blocks to be protected by the block group ...

Page 3

K8D6x16UTM / K8D6x16UBM 48 Ball TBGA/FBGA TOP VIEW (BALL DOWN FUNCTIONAL BLOCK DIAGRAM Bank1 Vcc Address Vss CE OE I/O Interface WE & BYTE Bank RESET Control RY/BY Bank2 Address WP/ACC A0~A21 ...

Page 4

... Organization x8/x16 Selectable Operating Voltage Range 2.7V to 3.6V Table 1. PRODUCT LINE-UP Part No. Vcc Max. Address Access Time (ns) Max. CE Access Time (ns) Max. OE Access Time (ns) Table 2. K8D6316U DEVICE BANK DIVISIONS Device Part Number Mbit K8D6316U 16 Mbit Access Time Operating Temperature Range C = Commercial Temp ...

Page 5

... K8D6x16UTM / K8D6x16UBM Table 3. Top Boot Block Address (K8D6316UT) K8D6316UT Block A21 A20 A19 BA134 BA133 BA132 BA131 BA130 BA129 BA128 BA127 BA126 BA125 BA124 BA123 BA122 BA121 ...

Page 6

... K8D6x16UTM / K8D6x16UBM Table 3. Top Boot Block Address (Continued) K8D6316UT Block A21 A20 A19 BA98 Bank1 BA97 BA96 BA95 BA94 BA93 BA92 BA91 BA90 BA89 BA88 BA87 BA86 BA85 ...

Page 7

... K8D6x16UTM / K8D6x16UBM Table 3. Top Boot Block Address (Continued) K8D6316UT Block A21 A20 A19 A18 BA70 BA69 BA68 BA67 BA66 BA65 BA64 BA63 BA62 BA61 BA60 BA59 BA58 BA57 ...

Page 8

... BA3 BA2 BA1 BA0 Note : The bank address bits are A21 A20 for K8D6316UT. Table 4. Secode Block Addresses for Top Boot Devices Device K8D6316UT Block Address Block Size (KB/KW) A17 A16 A15 A14 A13 A12 ...

Page 9

... K8D6x16UTM / K8D6x16UBM Table 5. Bottom Boot Block Address (K8D6316UB) K8D6316UB Block A21 A20 A19 BA134 BA133 BA132 BA131 BA130 BA129 BA128 BA127 BA126 BA125 BA124 BA123 BA122 BA121 ...

Page 10

... K8D6x16UTM / K8D6x16UBM Table 5. Bottom Block Address (Continued) K8D6316UB Block A21 A20 A19 A18 BA98 BA97 BA96 BA95 BA94 BA93 BA92 BA91 BA90 BA89 BA88 BA87 BA86 BA85 ...

Page 11

... K8D6x16UTM / K8D6x16UBM Table 5. Bottom Boot Block Address (Continued) K8D6316UB Block A21 A20 A19 A18 BA70 BA69 BA68 BA67 BA66 BA65 BA64 BA63 BA62 BA61 BA60 BA59 BA58 BA57 ...

Page 12

... BA3 BA2 BA1 BA0 Note : The bank address bits are A21 A20 for K8D6316UB. Table 6. Secode Block Addresses for Bottom Boot Devices Device K8D6316UB Block Address Block Size (KB/KW) A17 A16 A15 A14 A13 A12 ...

Page 13

... The command set of K8D6316U is fully compatible with standard Flash devices. The device is controlled by chip enable (CE), output enable (OE) and write enable (WE). Device operations are executed by selective command codes. The command codes to be com- bined with addresses and data are sequentially written to the command registers using microprocessor write timing ...

Page 14

... K8D6x16UTM / K8D6x16UBM COMMAND DEFINITIONS The K8D6316U operates by selecting and executing its operational modes. Each operational mode has its own command set. In order to select a certain mode, a proper command with specific address and data sequences must be written into the command reg- ister. Writing incorrect information which include address and data or writing an improper command will reset the device to the read mode ...

Page 15

... Command is valid when the device is in read mode or Autoselect mode. 7. DQ8 - DQ15 are don’t care in command sequence, but RD and PD is excluded. 8. A11 - A21 are also don’t care, except for the case of special notice. Table 9. K8D6316U Autoselect Codes, (High Voltage Method) Description CE ...

Page 16

... Read Mode The K8D6316U is controlled by Chip Enable (CE), Output Enable (OE) and Write Enable (WE). When CE and OE are low and WE is high, the data stored at the specified address location,will be the output of the device. The outputs are in high impedance state whenever high. ...

Page 17

... Program The K8D6316U can be programmed in units of a word or a byte. Programming is writing 0's into the memory array by executing the Internal Program Routine. In order to perform the Internal Program Routine, a four-cycle command sequence is necessary. The first two cycles are unlock cycles. The third cycle is assigned for the program setup command. In the last cycle, the address of the mem- ory location and the data to be programmed at that location are written ...

Page 18

... K8D6x16UTM / K8D6x16UBM Unlock Bypass The K8D6316U provides the unlock bypass mode to save its program time for program operation. The mode is invoked by the unlock bypass command sequence. Then, the unlock bypass program command sequence is required to program the device. Unlike the standard program command sequence that contains four bus cycles, the unlock bypass program command sequence comprises only two bus cycles ...

Page 19

K8D6x16UTM / K8D6x16UBM WE A21 A0(x16)/ 555H/ AAAH A21 A-1(x8) DQ15-DQ0 AAH RY/BY Erase Suspend / Resume The Erase Suspend command interrupts the Block Erase to read or program data in a block that is not being erased. The Erase ...

Page 20

... CE OE Block Group Protect Block Group Unprotect The K8D6316U needs the recovery time (20 s) from the rising edge order to execute its program, erase and read opera- tions. 500ns A9 ' Don t Care OE WE Address Notes : * Block Group Address is Don't Care during Block Group Unprotection. ...

Page 21

K8D6x16UTM / K8D6x16UBM Block Protect Algorithm Set up Block Group address Block Group Protect: Write 60H to Block Group address with A6=0,A1=1 A0=0 Wait 150 s Verify Block Group Protect:Write 40H to Block Group address with A6=0, Increment A1=1,A0=0 COUNT ...

Page 22

K8D6x16UTM / K8D6x16UBM Table 10. Block Group Address (Top Boot Block) Block Group A21 A20 A19 BGA0 BGA1 BGA2 BGA3 BGA4 BGA5 ...

Page 23

K8D6x16UTM / K8D6x16UBM Table 11. Block Group Address (Bottom Boot Block) Block Group A21 A20 A19 BGA0 BGA1 BGA2 BGA3 BGA4 BGA5 ...

Page 24

... Enter Secode Block command sequence, the system may read the Secode Block region by using the same addresses of the boot blocks (8KBx8). The K8D6316UT occupies the address of the byte mode 7F0000H to 7FFFFFH (word mode 3F8000H to 3FFFFFH) and the K8D6316UB type occupies the address of the byte mode 000000H to 00FFFFH (word mode 000000H to 007FFFH) ...

Page 25

... Erase Suspend state. Hardware Reset The K8D6316U offers a reset feature by driving the RESET pin to V When the RESET pin is driven low, any operation in progress will be terminated and the internal state machine will be reset to the standby mode after hardware reset occurs during a program operation, the data at that particular location will be lost. ...

Page 26

K8D6x16UTM / K8D6x16UBM Table 12. Common Flash Memory Interface Code Description Query Unique ASCII string "QRY" Primary OEM Command Set Address for Primary Extended Table Alternate OEM Command Set (00h = none exists) Address for Alternate OEM Extended Table (00h ...

Page 27

... Not Supported Volt 100mV ACC(Acceleration) Supply Maximum 00 = Not Supported Volt 100mV Top/Bottom Boot Block Flag 02H = Bottom Boot , 03H = Top Boot Note : 1. The number of blocks in Bank2 is device dependent. K8D6316U(16Mb/48Mb) = 60h (96blocks) FLASH MEMORY Addresses Addresses (Word Mode) (Byte Mode) 40H ...

Page 28

... K8D6x16UTM / K8D6x16UBM DEVICE STATUS FLAGS The K8D6316U has means to indicate its status of operation in the bank where a program or erase operation is in processes. Address must include bank address being excuted internal routine operation. The status is indicated by raising the device status flag via corresponding DQ pins or the RY/ BY pin. The corresponding DQ pins are DQ7, DQ6, DQ5, DQ3 and DQ2. The statuses are as follows : Table 13 ...

Page 29

... When the RY/ BY pin is low, the device will not accept any additional program or erase commands with the exception of the Erase Suspend command. If the K8D6316U is placed in an Erase Suspend mode, the RY/ BY output will be High. For programming, the RY valid (RY after the rising edge of the fourth WE pulse in the four write pulse sequence ...

Page 30

K8D6x16UTM / K8D6x16UBM Start Read(DQ0~DQ7) Valid Address DQ7 = Data ? No No DQ5 = 1 ? Yes Read(DQ0~DQ7) Valid Address DQ7 = Data ? No Fail Figure 11. Data Polling Algorithms Notes : 1. All protected block groups are ...

Page 31

K8D6x16UTM / K8D6x16UBM ABSOLUTE MAXIMUM RATINGS Parameter Vcc A9 RESET Voltage on any pin relative WP/ACC All Other Pins Commercial Temperature Under Bias Industrial Storage Temperature Short Circuit Output Current Operating Temperature Notes : 1. ...

Page 32

K8D6x16UTM / K8D6x16UBM Parameter Symbol Voltage for Autoselect and V Block Protect (4) Output Low Level V OL Output High Level V OH Low Vcc Lock-out Voltage (5) V LKO Notes : 1. The I current listed includes both the ...

Page 33

K8D6x16UTM / K8D6x16UBM AC CHARACTERISTICS Write(Erase/Program)Operations Alternate WE Controlled Write Parameter Write Cycle Time (1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time (1) Output Read (1) Enable Toggle and Data Polling ...

Page 34

K8D6x16UTM / K8D6x16UBM AC CHARACTERISTICS Write(Erase/Program)Operations Alternate CE Controlled Writes Parameter Write Cycle Time (1) Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time (1) Output Read (1) Enable Toggle and Data Polling ...

Page 35

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Read Operations Address HIGH-Z Outputs HIGH RY/BY Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Time CE & OE Disable Time (1) Output Hold Time from Address, ...

Page 36

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Hardware Reset/Read Operations Address RESET High-Z Outputs Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Hold Time from Address RESET Pulse ...

Page 37

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Alternate WE Controlled Program Operations t AS 555H Address CE t OES WPH A0H DATA t DS RY/BY Notes : 1. DQ7 ...

Page 38

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Alternate CE Controlled Program Operations 555H Address WE t OES A0H DATA t DS RY/BY Notes : 1. DQ7 is the output of the complement ...

Page 39

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Word to Byte Timing Diagram for Read Operation CE OE BYTE DQ0-DQ7 DQ8-DQ14 DQ15/A-1 Byte to Word Timing Diagram for Read Operation CE OE BYTE DQ0-DQ7 DQ8-DQ14 DQ15/A-1 BYTE Timing Diagram for Write Operation CE ...

Page 40

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Chip/Block Erase Operations t AS 555H Address CE t OES WPH AAH DATA t DS RY/BY Vcc t VCS Note : BA : Block ...

Page 41

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Read While Write Operations Read Command t RC DA2 Address DA1 (555H OES Valid Valid DQ Output (A0H) Note : This is an example in the ...

Page 42

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Data Polling During Internal Routine Operation OEH2 WE Data In DQ7 DQ0-DQ6 Data In Note : *DQ7=Vaild Data (The device has completed the internal operation). RY/BY Timing Diagram During Program/Erase Operation CE ...

Page 43

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Toggle Bit During Internal Routine Operation Address OEH2 Data In DQ6/DQ2 RY/BY Note : Address for the write operation must include a bank address (A20~A21) where the data is ...

Page 44

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS RESET Timing Diagram High RY/ RESET RY/ RESET Power-up and RESET Timing Diagram RESET Vcc Address DATA Parameter RESET Pulse Width RESET Low to Valid Data (During Internal Routine) ...

Page 45

K8D6x16UTM / K8D6x16UBM SWITCHING WAVEFORMS Block Group Protect & Unprotect Operations RESET BGA,A6 A1,A0 Block Group Protect / Unprotect DATA 60H RY/BY Notes : Block Group Protect ...

Page 46

K8D6x16UTM / K8D6x16UBM PACKAGE DIMENSIONS 48-Ball Tape Ball Grid Array Package (measured in millimeters) Top View 6.00 ±0.10 #A1 0.08MAX FLASH MEMORY Bottom View 6.00 ±0.10 0.80 x 5=4. (Datum A) 0.80 A (Datum ...

Page 47

K8D6x16UTM / K8D6x16UBM PACKAGE DIMENSIONS 48-PIN LEAD PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE( TSOP1 - 1220F #1 #24 0~8’C 0.45~0.75 0.018~0.030 20.00 0.20 0.787 0.008 #48 #25 18.40 0.10 0.724 0.004 ( 47 FLASH MEMORY Unit :mm/Inch 1.00 ...

Page 48

K8D6x16UTM / K8D6x16UBM PACKAGE DIMENSIONS 48-Ball Fine Ball Grid Array Package (measured in millimeters) Top View 6.00 ±0.10 #A1 0.08MAX FLASH MEMORY Bottom View 6.00 ±0.10 0.80 x 5=4. (Datum A) 0.80 A (Datum ...

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