hpfc-5400 ETC-unknow, hpfc-5400 Datasheet
hpfc-5400
Manufacturer Part Number
hpfc-5400
Description
Agilent Hpfc-5400 Tachyon Dx2 Dual Channel Fibre Channel Ic
Manufacturer
ETC-unknow
Datasheet
1.HPFC-5400.pdf
(2 pages)
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Product Description
The Tachyon DX2 is a high-
performance PCI/PCI-X native
dual 1 and 2 gigabit/sec Fibre
Channel controller for host bus
adapters and embedded sub-
systems.
DX2 is the fourth member of the
Agilent Technologies family of
Fibre Channel interface control-
lers. It provides the performance
enhancing features of PCI-X and
is a single chip solution that
offers the most economical
component cost savings.
The DX2 interfaces directly to an
industry standard PCI/PCI-X
bus. Each channel can be inde-
pendently configured to use
either an HSPI-compatible 10-bit
external SERDES or to use the
internal SERDES.
Applications
• Embedded subsystems
• Disk arrays
• SCSI bridge
• High performance host bus adapters
Agilent HPFC-5400 Tachyon DX2
Dual Channel Fibre Channel IC
Product Overview
Features
• Dual channel Fibre Channel operation
• Full duplex operation for each channel
• Concurrent for each dual channel
• 1 and 2 gigabit Fibre Channel operation
• Dual function industry standard
• 3.3V PCI/PCI-X I/O
• Compliance to PCI Local bus Specifica-
• MSI (Message Signaled Interrupt)
• Compliance to PCI-X Addendum,
• PCI/PCI-X hot plug compatible
• Output impedance control on PCI-X
• Eight GPIO pins per channel
• Loss of signal indication (per channel)
• Multiple split read transaction support
• No external SRAM required for
on one chip for the lowest overall FC
solution costs
operation at full link rate
support via internal transceivers or
external HSPI-compatible transceivers
(SERDES)
33/66 MHz PCI or 66/100/133 MHz
PCI-X backplane interface with 32/64
bit support
tion, Rev 2.2
support
Rev 1.0A
I/O for point-to-point or multi-point
connectivity
during internal serdes mode
on PCI-X
operation
• 4K on chip boot RAM
• Supports fabric, point-to-point
• Optional external boot ROM/Flash
• Eight full-frame inbound buffers and
• State machine processing of inbound
• Fully assisted Class 2 and Class 3 FCP
• Provision to support auto-speed
• Full byte-level parity protection on
• Backwards compatible to Tachyon XL2
• Supports ACK_0 and ACK_1 models in
• Complete sequence segmentation and
• 64-bit addressing (44/45 bits per
• Mechanisms to reduce number of
• Frame payload size up to 2048 bytes
• Loop map, broadcast, directed reset
• Non-zero login BB_Credit support
• Compliance with FC-AL-2 ANSI
• Compliance with Hardware Design
• Compatible with ACPI/Power
• Minimal board space required
(N_Port) and loop (Public and Private)
topologies
(128K Bytes)
four full-frame outbound buffers per FC
channel
and outbound data
with simultaneous initiator and target
functionality
negotiation in TSDK software
internal data path and RAM
programming interface
hardware
reassembly done in hardware
Length/Address pair)
interrupts generated by the adapter to
help reduce the software overhead
required to support the adapter
and bypass support
Standard
Guide for Microsoft Windows NT
Server, Version 2.0
Management Specification
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hpfc-5400 Summary of contents
Page 1
... SERDES. Applications • Embedded subsystems • Disk arrays • SCSI bridge • High performance host bus adapters Agilent HPFC-5400 Tachyon DX2 Dual Channel Fibre Channel IC Product Overview Features • Dual channel Fibre Channel operation on one chip for the lowest overall FC solution costs • ...
Page 2
Tachyon DX2 Architecture The Tachyon DX2 advances the Tachyon XL2 architecture, provid- ing a complete hardware-based solution in a dual channel Fibre Channel device. The DX2 offers full duplex capability within each channel as well as full performance. In addition, ...