am8192b RLS, am8192b Datasheet - Page 8

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am8192b

Manufacturer Part Number
am8192b
Description
Angular Magnetic Encoder Ic
Manufacturer
RLS
Datasheet
Data sheet
AM8192BD01_05
Issue 5, 14
Binary synchronous serial output SSI
Serial output data is available in up to 13 bit natural binary code through the SSI protocol. If the counting
direction is set to positive, the value of the output data increases when the magnet is rotated CW. When the
counting direction is set to negative and the magnet is rotated CW, the value of the output data decreases.
* Depends on master clock frequency (t
The controller interrogates the AM8192B for its positional value by sending a pulse train to the Clock input.
The Clock signal must always start from high. The first high/low transition (point 1) stores the current position
data in a parallel/serial converter and the monoflop is triggered. With each transition of Clock signal (high/low
or low/high) the monoflop is retriggered. At the first low/high transition (point 2) the most significant bit (MSB)
of binary code is transmitted through the Data pin to the controller. At each subsequent low/high transition of
Clock the next bit is transmitted to the controller. While reading the data the t
t
controller must wait longer than t
expires and the Data output goes to high (point 4).
It is possible to read the same position data several times to enlarge the reliability of transmitted data if the
ring register SSI mode is selected (Fig. 8). The controller must continue sending the Clock pulses and the
same data will be output again. Between the two outputs one logic zero will be output.
When no ring register mode is selected, the data is output only once (Fig. 9).
© 2009 RLS d.o.o.
mMin
Parameter
Clock period
Clock high
Clock low
Monoflop time
to keep the monoflop set. After the least significant bit (LSB) is output (point 3) the Data goes to low. The
Clock
Data
th
January 2009
1
Symbol
t
t
t
t
CL
CHI
CLO
m
2
MSB
Fig. 8: SSI multi-read of the same position data, ring register mode
t
CLO
t
CL
Min.
250
25
25
12.5
t
MSB-1 MSB-2
CHI
mMax
m
= 1024 / fosc)
before it can read updated position data. At this point the monoflop time
Max.
2 x t
t
t
20.5
m
m
Fig. 9: SSI no ring register mode
m
Fig. 7: SSI timing diagram
Unit
ns
ns
ns
µs
D4
Note
*
D3
A
D2
D1
CHI
associate company
D0
and t
3
CLO
t
m
must be less than
4
8

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