ml2500b Oki Optical Components, ml2500b Datasheet

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ml2500b

Manufacturer Part Number
ml2500b
Description
Analog-storage Single-chip Record/playback With Bit-cell Flash Memory
Manufacturer
Oki Optical Components
Datasheet

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Part Number:
ml2500bTAZ03A
Manufacturer:
OKI
Quantity:
20 000
GENERAL DESCRIPTION
Thanks to newly developed Analog Multi-Level Storage technology, ML2500B stores non-compressed analog
source signal directly into on-chip 1M Bit-Cell Flash memory. The result is superb sound quality without noise
and distortions introduced through coding/decoding, and impressive long-time record/playback capability up to
256 sec. ML2500B is fully controllable by an external MCU via the industry’s standard Serial Peripheral
Interface.
In addition, no backup requirement and low operating voltage (2.7 to 3.3 V) make the LSI an ideal choice for
compact, handy and portable terminals. ML2500B is a true single-chip solution to record/playback subsystem for
use with today’s size-critical electronic products.
DIFFERENCES BETWEEN THE ML2500BTA AND THE ML2500TA
FEATURES
•On-chip non-volatile 1M bit-cell Flash memory
•MCU Interface
•Record/Playback Time Length (With the int. Osc. or ext. clock at 8.192 MHz)
•Selectable Sampling Frequencies
•Maximum number of recording phrases: 320 phrases
•Phrase Control
•Built-in LPF/Smoothing Filter (LPF attenuation –40 dB/oct)
•Built-in Oscillation Circuit (8.192 MHz), No oscillator required
•Power Supply
•Operating Temperature:
*Notice
•Package:
OKI Semiconductor
ML2500BTA
Analog-Storage Single-chip Record/Playback LSI with 1M Bit-Cell Flash Memory
Operating Temperature
Pin Symbol
AC Characteristic
Program/Erase Cycles:
Data Retention
Serial Peripheral Interface (SPI; Mode 0)
Approx. 160 sec (At fsam = 6.4 kHz)
Approx. 190 sec (At fsam = 5.3 kHz)
Approx. 256 sec (At fsam = 4.0 kHz)
4.0 kHz, 5.3 kHz, 6.4 kHz
Fully controllable with user-definable Start, Stop addresses
Optional external clock input (Clock Frequency 4.0 to 8.192 MHz)
–40 to +70°C (guaranteed for both function and voice quality)
–40 to +85°C (guaranteed for function only) *Notice
The voice quality can deteriorate at temperatures beyond the range of –40 to +70°C.
DC and AC characteristics in this data sheet are specified for –40 to +70°C operating temperature range.
32-pin Plastic TSOP (TSOP(1)32-P-814-0.50-1K) (Product name: ML2500BTA)
Note: Please contact the Oki Sales office/Distributors for bare chips.
:
:
2.7 to 3.3 V
DI hold time t
Ta = –40 to +70°C
10,000 cycles
10 years
Pin 10: TEST2
ML2500BTA
DIH
= 30 ns
DI hold time t
Ta = –10 to +70°C
ML2500TA
Pin 10: NC
DIH
FEDL2500BFULL-02
= 20 ns
Issue Date: Aug.9, 2004
1/27

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ml2500b Summary of contents

Page 1

... Bit-Cell Flash memory. The result is superb sound quality without noise and distortions introduced through coding/decoding, and impressive long-time record/playback capability up to 256 sec. ML2500B is fully controllable by an external MCU via the industry’s standard Serial Peripheral Interface. ...

Page 2

... Addressable Memory Space for Recording..................................................................................................... 20 Address Control............................................................................................................................................... 21 1. Address Control for Recording ............................................................................................................ 21 2. Address Control for Playback .............................................................................................................. 21 LPF Cheracteristics ......................................................................................................................................... 22 Power Supply Circuit Design .......................................................................................................................... 22 LOUT Output Voltage Range Allowance ....................................................................................................... 23 States of Output Pins during Power Down...................................................................................................... 23 APPLICATION CIRCUITS ................................................................................................................................. 24 PACKAGE DIMENSIONS .................................................................................................................................. 25 CONTENTS FEDL2500BFULL-02 ML2500BTA 2/27 ...

Page 3

... ROSC 16 DGND NC: No connection. Keep NC pins open. LPF Analog Write & Read Circuits 1M Bit Cell Analog Storage Flash Memory Array Address Decoder CS SCK DI DO MON 32-Pin Plastic TSOP (Type 1) FEDL2500BFULL-02 ML2500BTA + AOUT – TEST1 TEST2 AV Power DD Supplies AGND DV DGND ...

Page 4

... LSl’s testing pin. Must be connected to DGND. Digital power supply pin. Insert a 0.1 µF or larger by-pass capacitor between this pin and the DGND pin. Digital Ground pin Analog power supply pin. Insert a 0.1 µF or larger by-pass capacitor between this pin and the AGND pin. Analog Ground pin FEDL2500BFULL-02 ML2500BTA 4/27 ...

Page 5

... Recording Operation DD1 I In Playback Operation DD2 I In Command-Wait State DD3 I — DDS FEDL2500BFULL-02 ML2500BTA Rating Unit –0.3 to +5.0 V –0 +0 –55 to +150 °C Range Unit 2.7 to 3.3 V –40 to +70 °C Min. Typ. Max. 3.85 4.096 4 ...

Page 6

... DD Symbol Condition *1 R — LIN kHz — LOUT *4 R — AOUT — V LOUT With respect to SG voltage FEDL2500BFULL-02 ML2500BTA Min. Typ. Max. Unit 1 — — MΩ 40 — — dB 200 — — kΩ 50 — — kΩ 0.5 — 2.2 V –0.5 — ...

Page 7

... At fsam = 6.4 kHz SPCP2 * 25°C, ∆f sam1 3 25° ∆f sam2 AV = 2 ∆ –40 to +70°C sam3 FEDL2500BFULL-02 ML2500BTA Min. Typ. Max. Unit µs 1 — — — — µs — — 100 µs — — ...

Page 8

... CSH t — — — DIS t — DIH t — DOD t — DOE t — DOZ t — CS FEDL2500BFULL-02 ML2500BTA Min. Typ. Max. Unit 100 — — ns 100 — — ns 100 — — ns 100 — — — — — — ...

Page 9

... OKI Semiconductor Operational Timing at Power-On To initialize the internal serial interface circuit of ML2500B after power-on, you must input “L” pulse to the RESET pin at the timing shown below. After this “L” pulse input, the ML2500B enters into standby state (Command-wait state). ...

Page 10

... Power Down Powering Up REC command input t t SPCM RECM t t RECR 62.5 ms(Typ.) 200 ms(Typ.) Erasing Recording FEDL2500BFULL-02 ML2500BTA Power-up with RESET pin t PWUP 1 ms Command-wait STOP command input PDWN command input SPCR t PDWN 200 ms(Typ.) Command-wait Power-down Dummy Recording 10/27 ...

Page 11

... Start and Stop Addresses are set by the STADR and SPADR commands prior to the PLAY command input. Power-up CS(I) MON(O) RPM Bit(O) AOUT(O) Status Power-down Command-wait PDWN command input STOP command input PLAY command input t SPCM t PLYM t SPCR t 10 ms(Typ.) PLYR Playing Back Command-wait FEDL2500BFULL-02 ML2500BTA 165 µs 165 µs t PDWN Power-down 11/27 ...

Page 12

... The dummy recording is given in the device specification and the recording contents are undefined. Pausing STOP command input t SPCM t SPCR t SPCP2 62.5 ms (Typ.) Pausing Recording FEDL2500BFULL-02 ML2500BTA PAUSE command input t SPCP1 Recording 200 ms (Typ.) Command Wait Dummy Recording 12/27 ...

Page 13

... Status Playing Back PAUSE command input CS (I) MON(O) RPM Bit(O) t PSCP VPM Bit(O) AOUT(O) Status Playing Back PAUSE command input t SPCP1 Pausing STOP command input t SPCM t SPCR t SPCP2 Pausing FEDL2500BFULL-02 ML2500BTA Playing Back 165 µ s 165 µ s 165 µ s Command Wait 13/27 ...

Page 14

... OKI Semiconductor FUNCTIONAL DESCRIPTION Serial Peripheral Interface (SPI) ML2500B communicates with the external Micro-Controller Unit through the industry's standard Serial Peripheral Interface (SPI). 1. Timing for Writing Command Data The following charts show timings for writing command data. After “L” input to CS pin, input command data, starting with the MSB in serial order, to the DI pin in sync with the SCK signal. The command input to the DI pin is fetched to the LSI’ ...

Page 15

... CS pin is brought to “H” level. Status Data Read-Out Timing CS(I) SCK(I) DI( Hi-Z DO(O) Memory Address Counter Read-Out Timing CS( SCK(I) DI( Hi-Z DO(O) CS( SCK(I) DI(I) DO( FEDL2500BFULL-02 ML2500BTA Hi A12 A11 A10 A9 Hi-Z 15/27 ...

Page 16

... You can suspend recording temporarily by using this command. The data following to this command is disregarded. To re-input the command resumes the suspended operation. If the STOP command is input while recording is suspended by the PAUSE command, the LSI shifts to Record Ending operation and then terminates recording. FEDL2500BFULL-02 Sampling Frequency 4.0 kHz 5.3 kHz 6.4 kHz (Default) ML2500BTA 16/27 ...

Page 17

... By using this command you can read out the values of the internal Status Register via serial interface. Reading the Status Register’s values lets you know ML2500B’s internal status as shown in the table below. In sync with SCK signal following to the RDSTAT command bits, 4-bit Status Register’s data is output to the DO pin, starting with the MSB. The DO pin’ ...

Page 18

... In synchronization with SCK signal following to the RDADR command, 13-bit Memory Address Counter’s value, starting with the MSB, is output to the DO pin. The DO pin’s output falls down to “L” level after 13th bit. This command can be input during playback and playback pausing. FEDL2500BFULL-02 ML2500BTA 18/27 ...

Page 19

... OKI Semiconductor 3. The list of Control Commands FEDL2500BFULL-02 ML2500BTA 19/27 ...

Page 20

... OKI Semiconductor Addressable Memory Space for Recording The total memory space of the ML2500B is divided into 4 blocks, 256 K bit-cell for each block, and a block is divided into 80 sectors, 3.2 K bit-cell for each sector. Finally, a sector is divided into 16 pages, 200 bit-cell for each page. A12 to A11 are assigned to represent a block address, A10 represent a sector address, and represent a page address ...

Page 21

... FEDL2500BFULL-02 ML2500BTA Specified Sector Page Address    A10   A12     4 FH] [0H  027F 4F F 04FF ...

Page 22

... As shown in the following figure, power supply to the LSI must be designed to have a single power source, and separate wiring for analog section and logic section. The following figures are bad wiring samples you should avoid. Analog Power Supply Digital Power Supply + ML2500BTA DGND AGND Power Supply FEDL2500BFULL-02 ML2500BTA 22/27 ...

Page 23

... OP amplifier (LOUT pin) are available. The non-inverting input is internally connected to the Reference Voltage (Signal Ground 1.35 V). As shown in the above wiring sample, the ML2500B is configured so that recording signal can be created through inverting amplifying circuit configured by connecting external resistors, R1 and R2, to the LIN pin and the LOUT pin ...

Page 24

... OKI Semiconductor APPLICATION CIRCUITS 0.1 µ F MCU 0.47 µ Ω LINE Ω Power Supply (+3 V) 0.1 µ RESET CS DI AOUT DO SCK MON LOUT TEST1 LIN EXCLK ROSC DGND SG AGND 3300 pF FEDL2500BFULL-02 ML2500BTA MSC1157 24/27 ...

Page 25

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). FEDL2500BFULL-02 ML2500BTA (Unit: mm) Package material Epoxy resin Lead frame material ...

Page 26

... Aug. 9, 2004 Page Previous Current Edition Edition   Final edition 1 Corrected the chart of 8bit command and 14 14 format. Added mentioned about prohibiting  20 specified addresses for Start Address and Stop Address.  21 Added the Example for setting address. FEDL2500BFULL-02 ML2500BTA Description 26/27 ...

Page 27

... The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these part of the contents contained herein may be reprinted or reproduced without our prior permission. FEDL2500BFULL-02 ML2500BTA Copyright 2004 Oki Electric Industry Co., Ltd. 27/27 ...

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