mp1541 MPS, mp1541 Datasheet - Page 6

• Manufacturer Part Number: mp1541
• Description: 1.3mhz Boost Converter
• Manufacturer: MPS

Compensation
The MP1541 uses an amplifier to compensate
the feedback loop rather than a traditional
transconductance amplifier like most current
mode regulators. Frequency compensation is
provided by an internal resistor and capacitor
along with an external resistor. The system
uses two poles and one zero to stabilize the
control loop. The poles are f
capacitor and load resistance, and f
internal compensation capacitor Cc, the gain of
the error amplifier and the resistance seen
looking out at the feedback node R
f
determined by the equations:
Where R
Where R1, R2, and R3 are seen in Figure 2.
The DC loop gain is:
There is also a right-half-plane zero (f
exists in all continuous mode (inductor current
does not drop to zero on each cycle) step up
converters. The frequency of the right half plane
zero is:
MP1541 Rev.1.3
9/21/2007
Z1
is set internally around 20kHz. These are
LOAD
A
f
P
VDC
2
f
is the load resistance and R
RHPZ
=
R
f
=
P
2
EQ
1
500
×
=
=
f
π
=
Z
π
×
1
2
R
∗
×
(
×
=
3
V
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
7
V
C
IN
9 .
π
20
+
IN
2
2
×
×
R (
R (
kHz
×
∗
1
1
L
×
10
R
R
1
1
V
R
×
P1
×
+
LOAD
LOAD
OUT
−
LOAD
V
9
R
R
OUT
set by the output
)
) 2
) 2
×
2
∗
R
2
V
EQ
P2
EQ
FB
. The zero
set by the
RHPZ
© 2007 MPS. All Rights Reserved.
EQ
www.MonolithicPower.com
) that
is:
To stabilize the regulation control loop, the
crossover frequency (the frequency where the
loop gain drops to 0dB or a gain of 1, indicated
as f
right-half-plane zero and should be at most
75kHz. f
maximum output load current (R
minimum) and minimum input voltage.
For the MP1541 it is recommended that a 47kΩ
to 100kΩ resistor be placed in series with the FB
pin and the resistor divider as seen in Figure 2.
For most applications this is all that is needed for
stable operation. If greater phase margin is
needed a series resistor and capacitor can be
placed in parallel with the high-side resistor R1 as
seen in Figure 2. The pole and zero set by the
lead-lag compensation network are:
LAYOUT CONSIDERATIONS
High frequency switching regulators require
very careful layout for stable operation and low
noise. All components must be placed as close
to the IC as possible. Keep the path between
L1, D1, and C2 extremely short for minimal
noise and ringing. C1 must be placed close to
the IN pin for best decoupling. All feedback
components must be kept close to the FB pin to
prevent noise injection on the FB pin trace. The
ground return of C1 and C2 should be tied
close to the GND pin. See the MP1541 demo
board layout for reference.
C
) should be at least one decade below the
MP1541 – 1.3MHz BOOST CONVERTER
f
P
3
RHPZ
=
2
f
Z
×
2
π
is at its lowest frequency at
=
×
2
C
×
3
×
π
⎛
⎜
⎜
⎜
⎜
⎝
×
R
C
4
3
1
+
1
×
(
R
R
1
1
1
+
+
R
R
1
1
4
2
)
LOAD
+
R
1
3
⎞
⎟
⎟
⎟
⎟
⎠
is at a
6