ax88790 ASIX Electronics Corporation, ax88790 Datasheet - Page 34
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ax88790
Manufacturer Part Number
ax88790
Description
Pcmcia 10/100m Fast Ethernet Controller With Embedded Phy
Manufacturer
ASIX Electronics Corporation
Datasheet
1.AX88790.pdf
(60 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ax88790L
Manufacturer:
ASIX
Quantity:
20 000
21.0
21.15:0
21.7:0
21.11:8
21.15:12
28.15:9 (UNUSED)
28.8 (BAD_FRM)
28.7 (CODE)
28.6 (APS)
28.5 (DISCON)
28.4 (UNLOCKED)
28.3 (RXERR_ST)
28.2 (FRC_JAM)
28.1 (LNK100UP)
28.0 (LNK10UP)
4.4.13 MR21 –RXER Counter Register Bit Descriptions
4.4.14 MR28 –Device-Specific Register 1 (Status Register) Bit Descriptions
FIELD
FIELD
AX88790 L
TYPE
TYPE
R/LH
R/LH
R/LH
R/LH
R/LH
R/LH
W
R
R
R
R
R
R
R
R
This bit, when 0 puts this register in 16-bit counter mode. When 1, it puts
this register in 8-bit counter mode. This bit is reset to a 0 and cannot be read.
When in 16-bit counter mode, these maintain a count of RXERs. It is reset
on a read operation.
When in 8-bit counter mode, these maintain a count of RXERs. It is reset on
a read operation
When in 8-bit mode, these contain a count of false carrier events (802.3
section 27.3.1.5.1). It is reset on a read operaton.
When in 8-bit mode, these contain a count of disconnect events (Link
Unstable 6, 802.3 section 27.3.1.5.1). It is reset on a read operation.
Unused. Read as 0.
Bad Frame. If this bit is a 1, it indicates a packet has been received without
an SFD. This bit is only valid in 10Mbits/s mode.
This bit is latching high and will only clear after it has been read or the
device has been reset.
Code Violation. When this bit is a 1, it indicates a Manchester code
violation has occurred. The error code will be output on the MRXD lines.
Refer to Table 1 for a detailed description of the MRXD pin error codes.
This bit is only valid in 10Mbits/s mode.
This bit is latching high and will only clear after it has been read or the
device has been reset.
Autopolarity Status. When register 30, bit 3 is set and this bit is a 1, it
indicates the PHY has detected and corrected a polarity reversal on the
twisted pair.
If the APF_EN bit (register 30, bit 3) is set, the reversal will be corrected
inside the PHY. This bit is not valid in 100Mbits/s operation.
Disconnect. If this bit is a 1, it indicates a disconnect. This bit will latch
high until read. This bit is only valid in 100Mbits/s mode.
Unlocked. Indicates that the TX scrambler lost lock. This bit will latch high
until read. This bit is only valid in 100Mbits/s mode.
RX Error Status. Indicates a false carrier. This bit will latch high until
read. This bit is only valid in 100Mbits/s mode.
Force Jam. This bit will latch high until read. This bit is only valid in
100Mbits/s mode.
Link Up 100. This bit, when set to a 1, indicates a 100Mbits/s transceiver is
up and operational.
Link Up 10. This bit, when set to a 1, indicates a 10Mbits/s transceiver is up
and operational.
3-in-1 PCMCIA Fast Ethernet Controller
34
DESCRIPTION
DESCRIPTION
ASIX ELECTRONICS CORPORATION