ax88190a ASIX Electronics Corporation, ax88190a Datasheet - Page 10

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ax88190a

Manufacturer Part Number
ax88190a
Description
Pcmcia 10/100m Fast Ethernet Mac Controller With Embedded Memory
Manufacturer
ASIX Electronics Corporation
Datasheet

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GPIO3#
GPIO2
GPIO1#
GPIO0#
Tab - 6 General Pursose I/O pins group
2.7 Miscellaneous pins group
LCLK/XTALIN
XTALOUT
CLKO
CLK_DIV3#
PPWDN
RESET
TEST#
EEPROM SIZE
NC
LVDD
HVDD
VSS
Tab - 7 Miscellaneous pins group
SIGNAL
AX88190A
TYPE
I/PU
I/PD
I/PU
I/PU
N/A
I/O
I/O
I/O
I/O
O
O
O
P
P
P
I
93, 102, 105,
46–48, 50–
19, 29, 64,
11, 24, 34,
39, 40, 49,
59, 69, 81,
53, 55-56,
100, 110,
PIN NO.
126, 128
44, 54,
103
104
101
114
127
119
41
42
43
45
67
77
73
75
PCMCIA Fast Ethernet MAC Controller
Default “1”. The pin reflects register offset 1Ah bit 3 inverted value.
Default “0”. The pin reflects register offset 1Ah bit 2 value.
Default “1”. The pin reflects register offset 1Ah bit 1 inverted value.
Default “1”. The pin reflects register offset 1Ah bit 0 inverted value.
CMOS Local Clock : Typical a 25Mhz clock, +/- 100 ppm, 40%-60%
duty cycle. ( See application note also )
Crystal Oscillator Input : Typical a 25Mhz crystal, +/- 25 ppm can be
connected across XTALIN and XTALOUT.
Crystal Oscillator Output : Typical a 25Mhz crystal, +/- 25 ppm can be
connected across XTALIN and XTALOUT. If a single-ended external
clock (LCLK) is connected to XTALIN, the crystal output pin should
be left floating.
Clock Output : This clock is source from LCLK/XTALIN.
Clock Devide 3 Enable : Active low to enable the devided 3 circuit.
That internally devides LCLK/XTALIN input frequeny by 3 and then
feed into internal circuit for system clock used.
Default value set to logic high, this function is disabled.
Phy Power Down : This pin connects to PHY chip power down mode
control input.
Reset
Reset is active high then place AX88190A into reset mode
immediately. During Falling edge the AX88190A loads the EEPROM
data.
Test Pin : Active LOW
The pin is just for test mode setting purpose only. Must be pull high
when normal operation.
EEPROM SIZE = 0 : 93C46 128 byte type EEPROM is used.
EEPROM SIZE = 1 : 93C56 256 byte type EEPROM is used.
No Connection : for manufacturing test only.
Power Supply : +3.3V DC.
Power Supply : +5V DC.
Note : for pure 3.3V single power solution, all the HVDD pin can
connect to +3.3V. Care should be taken that HVDD input power must
be greater or equal ( > = ) than LVDD.
Power Supply : +0V DC or Ground Power.
10
DESCRIPTION
ASIX ELECTRONICS CORPORATION

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