ch7008a Chrontel, ch7008a Datasheet - Page 7

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ch7008a

Manufacturer Part Number
ch7008a
Description
Digital Pc To Tv Encoder
Manufacturer
Chrontel
Datasheet

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When IDF = 9, (YCrCb 8-bit mode), H and V sync signals can be embedded into the data stream. In this mode, the
embedded sync will be similar to the CCIR656 convention, and the first byte of the ‘video timing reference code’
will be assumed to occur when a Cb sample would occur – if the video stream was continuous. This is delineated in
Table 6 shown below.
In this mode, the S[7:0] byte contains the following data:
S[6]
S[5]
S[4]
Bits S[7] and S[3-0] are ignored.
201-0000-027 Rev 2.8, 6/24/2004
Table 4. RGB 12-bit Multilexed Mode
Table 5. YCrCb Multiplexed Mode
Table 6. YCrCb Multiplexed Mode with Embedded Syncs
Pixel#
Bus Data
Pixel#
Bus Data
Pixel#
Bus Data
Format
Format
IDF#
Format
IDF#
IDF#
=
=
=
D[11]
D[10]
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
F
V
H
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
=
=
=
P0a
G0[3]
G0[2]
G0[1]
G0[0]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
B0[2]
B0[1]
B0[0]
P0a
Cb0[7]
Cb0[6]
Cb0[5]
Cb0[4]
Cb0[3]
Cb0[2]
Cb0[1]
Cb0[0]
P0a
1
1
1
1
1
1
1
1
1 during field 2, 0 during field 1
1 during field blanking, 0 elsewhere
1 during EAV (the synchronization reference at the end of active video)
0 during SAV (the synchronization reference at the start of active video)
P0b
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
R0[2]
R0[1]
R0[0]
G0[7]
G0[6]
G0[5]
G0[4]
12-bit RGB (12-12)
P0b
Y0[7]
Y0[6]
Y0[5]
Y0[4]
Y0[3]
Y0[2]
Y0[1]
Y0[0]
P0b
0
0
0
0
0
0
0
0
4
P1a
G1[3]
G1[2]
G1[1]
G1[0]
B1[7]
B1[6]
B1[5]
B1[4]
B1[3]
B1[2]
B1[1]
B1[0]
P1a
Cr0[7]
Cr0[6]
Cr0[5]
Cr0[4]
Cr0[3]
Cr0[2]
Cr0[1]
Cr0[0]
P1a
0
0
0
0
0
0
0
0
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
R1[2]
R1[1]
R1[0]
G1[7]
G1[6]
G1[5]
G1[4]
P1b
Y1[7]
Y1[6]
Y1[5]
Y1[4]
Y1[3]
Y1[2]
Y1[1]
Y1[0]
P1b
S[7]
S[6]
S[5]
S[4]
S[3]
S[2]
S[1]
S[0]
YCrCb 8-bit
YCrCb 8-bit
9
9
P0a
G0[4]
G0[3]
G0[2]
B0[7]
B0[6]
B0[5]
B0[4]
B0[3]
G0[0]
B0[2]
B0[1]
B0[0]
P2a
P2a
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
Cb2[7]
Cb2[6]
Cb2[5]
Cb2[4]
Cb2[3]
Cb2[2]
Cb2[1]
Cb2[0]
P0b
R0[7]
R0[6]
R0[5]
R0[4]
R0[3]
G0[7]
G0[6]
G0[5]
R0[2]
R0[1]
R0[0]
G0[1]
12-bit RGB (12-12)
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
P2b
Y2[7]
Y2[6]
Y2[5]
Y2[4]
Y2[3]
Y2[2]
Y2[1]
Y2[0]
5
P1a
G1[4]
G1[3]
G1[2]
B1[7]
B1[6]
B1[7]
B1[4]
B1[3]
G1[0]
B1[2]
B1[1]
B1[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
P3a
Cr2[7]
Cr2[6]
Cr2[5]
Cr2[4]
Cr2[3]
Cr2[2]
Cr2[1]
Cr2[0]
CH7008A
P1b
R1[7]
R1[6]
R1[5]
R1[4]
R1[3]
G1[7]
G1[6]
G1[5]
R1[2]
R1[1]
R1[0]
G1[1]
P3b
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
P3b
Y3[7]
Y3[6]
Y3[5]
Y3[4]
Y3[3]
Y3[2]
Y3[1]
Y3[0]
7

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