ov9625 ETC-unknow, ov9625 Datasheet - Page 6

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ov9625

Manufacturer Part Number
ov9625
Description
Ov9625 Color Cmos Sxga Mpixel Camerachip Ov9121 Cmos Sxga Mpixel Camerachip
Manufacturer
ETC-unknow
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
OV9625
Manufacturer:
OMNIVISIO
Quantity:
20 000
OV9625/OV9121
Digital Video Port
Figure 11 Connection Examples
6
MSB/LSB Swap
OV9625/OV9121 has a 10-bit digital video port. The MSB
and LSB can be swapped with the control registers.
Figure 11
external devices.
(OV9121)
(OV9121)
OV9625
OV9625
MSB D9
MSB D9
LSB D0
LSB D0
Default 10-bit Connection
Default 8-bit Connection
D8
D7
D6
D5
D4
D3
D2
D1
D8
D7
D6
D5
D4
D3
D2
D1
shows some examples of connections with
Proprietary to OmniVision Technologies
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
External
External
Device
Device
CMOS SXGA (1.3 MPixel) C
(OV9121)
(OV9121)
OV9625
OV9625
MSB D0
MSB D0
LSB D9
LSB D9
Swap 10-bit Connection
Swap 8-bit Connection
D8
D7
D6
D5
D4
D3
D2
D1
D8
D7
D6
D5
D4
D3
D2
D1
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D0
D1
D2
D3
D4
D5
D6
D7
External
External
Device
Device
AMERA
Figure 12 PCLK Output Only at Valid Pixels
PCLK
PCLK active edge negative
HREF
PCLK
PCLK active edge positive
VSYNC
C
1022
1023
R/C
HIP
0
1
2
3
.
.
Line/Pixel Timing
The
programmed to work in either master or slave mode.
In both master and slave modes, pixel data output is
synchronous with PCLK (or MCLK if port is a slave),
HREF and VSYNC. The default PCLK edge for valid data
is the negative edge but may be programmed with register
COMK[4] (see
Basic line/pixel output timing is illustrated in
Figure
To minimize image capture circuitry and conserve
memory space, PCLK output can be programmed with
register COMK[5] (see
qualified by the active video period as defined by the
HREF signal. See
Pixel Output Pattern
Table 1
OV9625/OV9121. The data output sequence following the
first HREF and after VSYNC is: B
B
R
OV9625/OV9121
resolution data, horizontal and vertical sub-sampling will
occur. The default output sequence for the first line of
output will be: B
second line of output will be: G
R
Table 1
0,1278
1,1
1,1277
G
B
G
G
B
B
1022,0
1023,0
OV9625/OV9121
G
0
0,0
2,0
15.
1,0
3,0
.
G
1,2
0,1279
shows
G
R
G
R
R
1022,1
1023,1
R
G
1
0,1
1,1
3,1
“COMK” on page
. After the second HREF, the output is G
1,3
2
Data Pattern
0,0
the
Figure 12
B
G
G
is
G
G
B
B
1022,2
1023,2
2
0,2
2,2
0,1
1,2
3,2
G
1,1278
programmed
Version 1.3, September 15, 2003
output
B
G
R
digital
0,4
“COMK” on page
G
G
R
R
1023,3
1022,3
3
1,3
3,3
0,3
2,3
for details.
G
1,0
0,5
R
22) for the positive edge.
data
1,1279
R
. . .
. . .
. . .
. . .
… B
. . .
video
.
.
1,1
0,0
G
G
0,1276
B
…,
to
order
B
G
B
G
1022,1278
1023,1278
1,4
G
1278
0,1278
1,1278
2,1278
3,1278
0,1
port
R
Figure 14
output
O
etc.
1,5
G
B
mni
22) to be
0,1277
0,2
from
… G
G
R
can
G
R
G
R
1023,1279
1022,1279
1279
If
G
1,1279
3,1279
0,1279
2,1279
1,1276
. The
ision
0,3
VGA
and
the
the
be
1,0

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