MP7610AP EXAR [Exar Corporation], MP7610AP Datasheet - Page 5

• Manufacturer Part Number: MP7610AP
• Description: D/A Converter with Output Amplifier and Serial Data/Address mP Control Logic
• Manufacturer: EXAR [Exar Corporation]

ELECTRICAL CHARACTERISTICS (CONT’D)
Parameter
DYNAMIC PERFORMANCE
Voltage Settling from LD
Channel-to-Channel Crosstalk
Digital Feedthrough
Power Supply Rejection Ratio
REFERENCE INPUTS
Impedance of V
V
DIGITAL INPUTS
Logic High
Logic Low
Input Current
Input Capacitance
ANALOG OUTPUTS
Output Swing
Output Drive Current
Output Impedance
Output Short Circuit Current
DIGITAL OUTPUTS
Output High Voltage
Output Low Voltage
POWER SUPPLIES
V
V
DV
Positive Supply Current
Negative Supply Current
Digital Supply Current
Power Dissipation
ANALOG GROUND CURRENT
Per Channel
DIGITAL TIMING
SPECIFICATIONS
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
DAC Register Load Pulse Width
Preset Pulse Width
Clock Edge to Load Time
LD Falling Edge to SDO
REF
CC
EE
to VDAC Out
Tri-state Enable
DD
Rev. 4.01
Voltage
Voltage
Voltage1,
Voltage
5
5
1
REF
2
1
3
1
1,4
1, 6
6
Symbol
t
CH
t
t
PSRR
PD
I
CKLD1
CKLD2
DV
V
AGND
REF
V
V
, t
t
V
V
REF
V
HZ1
I
I
I
t
t
t
t
CT
V
R
I
ISS
t
OH
t
C
SC
CC
DD
CC
DD
DS
DH
PD
PR
OL
EE
EE
LD
CL
sd
IH
Q
I
IL
O
L
L
--12.75
--V
V
REF
Min
EE
350
140
3.5
2.4
4.5
--5
60
15
15
45
65
50
0
+1.4
+1.5
0.04
25
--70
700
--12
320
±60
Typ
4.5
0.5
30
25
30
40
55
12
15
V
°
1
5
8
CC
C
--1.4
1.05k
12.75
Max
±10
420
0.8
5.5
50
--5
10
20
40
5
5
6
8
5
2
V
--12.75
REF
Tmin to Tmax
Min
350
4.5
+1.5 12.75
1.05k
Max
450
5.5
50
--5
10
20
2
Units
ms
LSB
dB
ppm/%
W
V
V
V
mA
pF
V
mA
W
mA
mA
mA
mA
V
V
V
V
V
mA
mA
mA
mW
mA
ns
ns
ns
ns
ns
ns
ns
ns
ZS to FS (20 V Step)
5k, 50pF load
DC
CLK and Data to V
DV
See Application Hints for Driving
the reference input
+FS to AGND
+FS to V
--FS to AGND
--FS to V
Bipolar zero
Bipolar zero
Bipolar zero
Bipolar zero
See Application Notes
Note: t
be min. since t
V
Test Conditions/Comments
IL
EE
= 0, V
& DV
LD
EE
CC
and t
IH
CC
= 5.0, C
= ±5%, ppm of FS
CKLD1
CKLD2
OUTi
=t
L
cannot both
CKLD2
= 20 pF
+t
LD