MP7680JE EXAR [Exar Corporation], MP7680JE Datasheet

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MP7680JE

Manufacturer Part Number
MP7680JE
Description
5 V CMOS 12-Bit Quad Double-Buffered Multiplying Digital-to-Analog Converter
Manufacturer
EXAR [Exar Corporation]
Datasheet
FEA TURES
· Exar Pioneered Segmented DAC Approach
· Four Double-Buffered 12-bit DACs on a Single Chip
· Independent Reference Inputs
· Lowest Gain Error in a Multiple DAC Chip
· Guaranteed Monotonic
· TTL/5 V CMOS Compatible Inputs
· Industry Standard Digital Interface
· Four Quadrant Multiplication
· Latch-Up Free
GENERAL
The MP7680 and the integrate four 12-bit four-quadrant-
multiplying DACs with independent reference inputs and
excellent matching characteristics. The MP7680 grades
offer 1/2, 1 and 2 LSB of relative accuracy. The superior
offers a low 2 LSB of gain error.
ORDERING
E1998
Rev. 3.10
DESCRIPTIONS
INFORMA TION
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z (510) 668-7017
Plastic Dip
Plastic Dip
Package
PQFP
PQFP
Type
-40 to +85° ° C
Temperature
-40 to +85° ° C
-40 to +85° ° C
-40 to +85° ° C
Range
MP7680KN
MP7680KE
MP7680JN
MP7680JE
Part No.
Each DAC has double-buffering (an 8 and 4-bit latch and
a 12-bit latch) between the data bus (DB11 - DB0) and the
DAC. The internal 4-bit mux allows the use of 8 or 16-bit
buses. The flexible latch control logic allows to update
one or more DACs simultaneously.
(LSB)
INL
BENEFITS
· Reduced Board Space; Lower System Cost.
· Independent Control of DACs
· Excellent DAC-to-DAC Matching and Tracking
APPLICA TIONS
· Function Generators
· Automatic Test Equipment
· Precision Process Controls
· Recording Studio Control Boards
+2
+1
+2
+1
Quad Double-Buffered Multiplying
Digital-to-Analog Converter
(LSB)
DNL
+4
+2
+4
+2
Gain Error
5 V CMOS 12-Bit
(LSB)
+16
+16
+16
+16
MP7680
June 2000-2

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MP7680JE Summary of contents

Page 1

... DAC. The internal 4-bit mux allows the use 16-bit buses. The flexible latch control logic allows to update one or more DACs simultaneously. INL DNL Part No. (LSB) (LSB) MP7680JN +2 +4 MP7680KN +1 +2 MP7680JE +2 +4 MP7680KE +1 +2 MP7680 5 V CMOS 12-Bit June 2000-2 Gain Error (LSB) +16 +16 +16 ...

Page 2

MP7680 DB11 - DB4 8 (MSB MUX 4 DB3 - DB0 1 (LSB) 4 B1/B2 Rev. 3.10 8-Bit Latch 12-Bit Latch 4-Bit Latch 8-Bit Latch 12-Bit Latch 4-Bit Latch 8-Bit Latch 12-Bit Latch 4-Bit Latch 8-Bit Latch ...

Page 3

PIN CONFIGURA TIONS DGND AV DD Rev. 3. XFER 2 39 WR2 3 38 WR1 REFA FBA OUT1A I 10 ...

Page 4

MP7680 PIN DESCRIPTION 40 Pin PDIP , CDIP PIN NO. NAME DESCRIPTION 1 A1 DAC Address Bit 1 2 XFER Transfer: Updates all DAC’s 3 WR2 Write 2: Gates the XFER Function 4 WR1 Write 1: Gates the DAC Selection ...

Page 5

ELECTRICAL CHARACTERISTICS ( + Parameter Symbol 1 ST ATIC PERFORMANCE Resolution (All Grades) Integral Non-Linearity (Relative Accuracy Differential Non-Linearity DNL K ...

Page 6

MP7680 ELECTRICAL CHARACTERISTICS Parameter SUPPL Y 4 POWER Functional Voltage Range Supply Current TIMING CHARACTERISTICS Write Pulse Width Chip Select Set-Up Time Address Set-Up Time Chip Select and Address Hold Time Latch Select Set-Up Time Latch Select ...

Page 7

VALID B1/ DATA VALID t WR WR1 XFER WR2 Figure Rev. 3. NOTES XFER = Low . t 2. The ...

Page 8

MP7680 DB11-DB4 (MSB) 0 DB11- DB8 MUX DB3-DB0 1 (LSB) Disable-B1 B1/B2 A1 (MSB) Latch A0 (LSB) Address Decoder CS WR1 THEOR Y OF OPERA TION Digital Interface shows the internal control logic. The logic that Figure 3. controls the ...

Page 9

SELECTED Table 1. DAC Selection An 8-bit bus must use two cycles. The second cycle is like the first one with the difference that B1/B2 = low CS ...

Page 10

MP7680 Transferring Data to the DAC Latches Once one or all of the input latches have been loaded, the condition XFER = WR2= low transfers the content of ALL the input latches in the DAC latches. The output of the ...

Page 11

+10 V 10k REF01 10k REF02 10k 10k +15 V Figure 10. Digitally R FBA RA DAC A Left R Channel FBB Input + DAC B ...

Page 12

MP7680 Rev. 3.10 Notes 12 ...

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