MSE908JB8 FREESCALE [Freescale Semiconductor, Inc], MSE908JB8 Datasheet
MSE908JB8
Related parts for MSE908JB8
MSE908JB8 Summary of contents
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... Description When the USB module is enabled, the USB reset disable bit (RSTD) in the configuration register (CONFIG) is cleared and a USB reset is detected, there is a small chance the device will fail. © Freescale Semiconductor, Inc., 2006. All rights reserved. MSE908JB8_3K45H Rev. 1, 8/2006 SE116-USB ...
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Workaround When the USB module is enabled and a USB reset is detected, either an internal reset or an interrupt to the CPU can be generated. Which one is generated depends on the RSTD bit of CONFIG. Configuring the USB ...
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Glitch on Timer Buffered PWM Output In timer buffered PWM operation, when a timer overflow (TOF) event or an output compare (OC) event coincides with a write to either pair of the timer channel registers (TCHxH/L), the duty ...
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TOF Timer buffered PWM output Pulse width Period NOTES: Do not write to either pair of timer channel registers at: TOF (timer overflow (timer output compare) edges. In buffered PWM, the pulse width is defined by the last ...