DS1340-3 MAXIM [Maxim Integrated Products], DS1340-3 Datasheet - Page 12
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DS1340-3
Manufacturer Part Number
DS1340-3
Description
I2C RTC with Trickle Charger
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1.DS1340-3.pdf
(14 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS1340-3.3
Manufacturer:
MAXIM/美信
Quantity:
20 000
Company:
Part Number:
DS1340-33
Manufacturer:
ON
Quantity:
12 840
Figures 8 and 9 detail how data transfer is accom-
plished on the I
the R/W bit, two types of data transfer are possible:
The DS1340 can operate in the following two modes:
I
Figure 8. Slave Receiver Mode (Write Mode)
12
2
C RTC with Trickle Charger
Data transfer from a master transmitter to a
slave receiver. The first byte transmitted by the
master is the slave address. Next follows a num-
ber of data bytes. The slave returns an acknowl-
edge bit after each received byte.
Data transfer from a slave transmitter to a mas-
ter receiver. The master transmits the first byte (the
slave address). The slave then returns an acknowl-
edge bit. Next follows a number of data bytes trans-
mitted by the slave to the master. The master
returns an acknowledge bit after all received bytes
other than the last byte. At the end of the last
received byte, a not acknowledge is returned.
The master device generates all the serial clock
pulses and the START and STOP conditions. A
transfer is ended with a STOP condition or with a
repeated START condition. Since a repeated
START condition is also the beginning of the next
serial transfer, the bus is not released.
Slave Receiver Mode (Write Mode): Serial data
and clock are received through SDA and SCL.
After each byte is received, an acknowledge bit is
transmitted. Start and STOP conditions are recog-
nized as the beginning and end of a serial trans-
fer. Hardware performs address recognition after
reception of the slave address and direction bit.
The slave address byte is the first byte received
after the master generates the START condition.
The slave address byte contains the 7-bit DS1340
address, which is 1101000, followed by the direc-
tion bit (R/W), which is 0 for a write. After receiving
____________________________________________________________________
S — START
A — ACKNOWLEDGE
P — STOP
R/W — READ/WRITE OR DIRECTION BIT ADDRESS = D0H
S
ADDRESS>
<SLAVE
1101000
0
A
ADDRESS (n)>
2
XXXXXXXX
C bus. Depending upon the state of
<WORD
A
<DATA (n)>
XXXXXXXX A XXXXXXXX A XXXXXXXX A P
(X + 1 BYTES + ACKNOWLEDGE)
DATA TRANSFERRED
<DATA (n + 1)>
<DATA (n + X)>
Figure 9. Slave Transmitter Mode (Read Mode
and decoding the slave address byte, the DS1340
outputs an acknowledge on SDA. After the
DS1340 acknowledges the slave address + write
bit, the master transmits a word address to the
DS1340. This sets the register pointer on the
DS1340, with the DS1340 acknowledging the
transfer. The master can then transmit zero or
more bytes of data, with the DS1340 acknowledg-
ing each byte received. The register pointer incre-
ments after each data byte is transferred. The
master generates a STOP condition to terminate
the data write.
Slave Transmitter Mode (Read Mode): The first
byte is received and handled as in the slave
receiver mode. However, in this mode, the direc-
tion bit indicates that the transfer direction is
reversed. The DS1340 transmits serial data on
SDA while the serial clock is input on SCL. Start
and STOP conditions are recognized as the begin-
ning and end of a serial transfer. Hardware per-
forms address recognition after reception of the
slave address and direction bit. The slave address
byte is the first byte received after the master gen-
erates the START condition. The slave address
byte contains the 7-bit DS1340 address, which is
1101000, followed by the direction bit (R/W),
which is 1 for a read. After receiving and decoding
the slave address byte, the DS1340 outputs an
acknowledge on SDA. The DS1340 then begins to
transmit data starting with the register address
pointed to by the register pointer. If the register
pointer is not written to before the initiation of a
read mode, the first address that is read is the last
one stored in the register pointer. The DS1340
must receive a not acknowledge to end a read.
S — START
A — ACKNOWLEDGE
P — STOP
A — NOT ACKNOWLEDGE
R/W — READ/WRITE OR DIRECTION BIT ADDRESS = D0H
S
ADDRESS>
<SLAVE
1101000
1
A
<DATA (n)>
XXXXXXXX
A
NOTE: LAST DATA BYTE IS FOLLOWED BY
<DATA (n + 1)>
XXXXXXXX A XXXXXXXX A XXXXXXXX A P
A NOT ACKNOWLEDGE (A) SIGNAL
(X + 1 BYTES + ACKNOWLEDGE)
DATA TRANSFERRED
<DATA (n + 2)>
<DATA (n + X)>