DS92001TM NSC [National Semiconductor], DS92001TM Datasheet - Page 7

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DS92001TM

Manufacturer Part Number
DS92001TM
Description
3.3V B/LVDS-BLVDS Buffer
Manufacturer
NSC [National Semiconductor]
Datasheet

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AC Test Circuits and Timing Diagrams
DS92001 Pin Description (SOIC and LLP)
Pin Name
OUT -
OUT+
GND
GND
IN −
LOS
V
IN+
EN
CC
FIGURE 9. LOS Output Waveforms for Propagation Delay, and Rise/Fall Times
Pin #
DAP
1
2
3
4
5
6
7
8
Input/Output
O
O
O
P
P
P
I
I
I
Ground
Inverting receiver B/LVDS input pin
Non-inverting receiver B/LVDS input pin
Loss of Signal output pin. LOS is asserted low while signal is invalid.
See Applications Information section.
Power Supply, 3.3V
Non-inverting driver BLVDS output pin
Inverting driver BLVDS output pin
Enable pin. When EN is LOW, the driver is disabled and the BLVDS
outputs are in TRI-STATE. When EN is HIGH, the driver is enabled.
LVCMOS/LVTTL levels.
LLP Package Ground
7
(Continued)
±
0.3V.
Description
20024742
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