DS2777 MAXIM [Maxim Integrated Products], DS2777 Datasheet - Page 42

• Manufacturer Part Number: DS2777
• Description: 2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with Protector and Optional SHA-1 Authentication
• Manufacturer: MAXIM [Maxim Integrated Products]

2-Cell, Stand-Alone, Li+ Fuel-Gauge IC with
Protector and Optional SHA-1 Authentication
A byte of data consists of 8 bits ordered MSb first. The
LSb of each byte is followed by the acknowledge bit.
The DS2777/DS2778 registers composed of multibyte
values are ordered MSB first. The MSB of multibyte reg-
isters is stored on even data memory addresses.
A bus master initiates communication with a slave
device by issuing a START condition followed by a
slave address (SAddr) and the read/write (R/W) bit.
When the bus is idle, the DS2777/DS2778 continuously
monitor for a START condition followed by its slave
address. When the DS2777/DS2778 receive a slave
address that matches the value in its Programmable
Slave Address register, they respond with an acknowl-
edge bit during the clock period following the R/W bit.
The 7-bit Programmable Slave Address register is fac-
tory programmed to 0110100. The slave address can
be reprogrammed. See the Programmable Slave
Address section for details.
The 2-wire slave address of the DS2777/DS2778 is
stored in the parameter EEPROM block, address 80h.
Programming the slave address requires a write to 80h
with the desired slave address. The new slave address
value is effective following the write to 80h and must be
used to address the DS2777/DS2778 on subsequent
bus transactions. The slave address value is not stored
to EEPROM until a Copy EEPROM Block 1 command is
executed. Prior to executing the Copy command,
power cycling the DS2777/DS2778 restores the original
slave address value. The data format of the slave
address value in address 80h is shown in the Slave
Address Format (80h) section.
The R/W bit following the slave address determines the
data direction of subsequent bytes in the transfer. R/W
= 0 selects a write transaction, with the subsequent
bytes being written by the master to the slave. R/W = 1
Bits 7 to 1: Slave Address (A[6:0]). A[6:0] contains the 7-bit slave address of the DS2777/DS2778. The factory
default is 0110100b.
Bit 0: Reserved.
42
______________________________________________________________________________________
BIT 7
A6
Programmable Slave Address
BIT 6
A5
Read/Write Bit
Slave Address
BIT 5
A4
Data Order
BIT 4
A3
selects a read transaction, with the subsequent bytes
being read from the slave by the master.
The DS2777/DS2778 are compatible with any bus tim-
ing up to 400kHz. No special configuration is required
to operate at any speed.
The command protocols involve several transaction for-
mats. The simplest format consists of the master writing
the START bit, slave address, R/W bit, and then moni-
toring the acknowledge bit for presence of the
DS2777/DS2778. More complex formats such as the
Write Data, Read Data, and Function command proto-
cols write data, read data, and execute device-specific
operations. All bytes in each command format require
the slave or host to return an acknowledge bit before
continuing with the next byte. Each Function command
definition outlines the required transaction format. Table
14 applies to the transaction formats.
A write transaction transfers one or more data bytes to
the DS2777/DS2778. The data transfer begins at the
memory address supplied in the MAddr byte. Control of
the SDA signal is retained by the master throughout the
transaction, except for the acknowledge cycles.
A read transaction transfers one or more bytes from the
DS2777/DS2778. Read transactions are composed of
two parts with a write portion followed by a read portion
and are, therefore, inherently longer than a write trans-
action. The write portion communicates the starting
point for the read operation. The read portion follows
immediately, beginning with a repeated START, and
slave address with R/W set to a 1. Control of SDA is
Read: S SAddr W A MAddr A Sr SAddr R A Data0 N P
BIT 3
A2
Write: S SAddr W A MAddr A Data0 A P
2-Wire Command Protocols
Basic Transaction Formats
Write Portion
BIT 2
A1
Slave Address Format (80h)
BIT 1
A0
Bus Timing
Read Portion
BIT 0
X