DS18B20-PAR_07 MAXIM [Maxim Integrated Products], DS18B20-PAR_07 Datasheet - Page 15

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DS18B20-PAR_07

Manufacturer Part Number
DS18B20-PAR_07
Description
1-Wire Parasite-Power Digital Thermometer
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
the read time slot. Therefore, the master must release the bus and then sample the bus state within 15 μs
from the start of the slot.
Figure 14 illustrates that the sum of T
Figure 15 shows that system timing margin is maximized by keeping T
and by locating the master sample time during read time slots towards the end of the 15 μs period.
DETAILED MASTER READ 1 TIMING Figure 14
RECOMMENDED MASTER READ 1 TIMING Figure 15
DS18B20-PAR OPERATION EXAMPLE 1
In this example there are multiple DS18B20-PARs on the bus. The bus master initiates a temperature
conversion in a specific DS18B20-PAR and then reads its scratchpad and recalculates the CRC to verify
the data.
MASTER MODE
1-WIRE BUS
1-WIRE BUS
GND
GND
V
V
PU
PU
TX
RX
TX
TX
TX
TX
TX
RX
TX
TX
TX
T
small
INT
=
small
T
RC
DATA (LSB FIRST)
=
DQ line held high by
T
64-bit ROM code
64-bit ROM code
INT
strong pullup
> 1 μs
Presence
Presence
VIH of Master
Reset
Reset
BEh
55h
44h
55h
LINE TYPE LEGEND
INIT
, T
RC
Bus master pulling low
Resistor pullup
, and T
Master issues reset pulse.
DS18B20-PARs respond with presence pulse.
Master issues Match ROM command.
Master sends DS18B20-PAR ROM code.
Master issues Convert T command.
Master applies strong pullup to DQ for the duration of the
conversion (t
Master issues reset pulse.
DS18B20-PARs respond with presence pulse.
Master issues Match ROM command.
Master sends DS18B20-PAR ROM code.
Master issues Read Scratchpad command.
15 of 19
15 μs
15 μs
T
RC
SAMPLE
conv
must be less than 15 μs for a read time slot.
).
Master samples
VIH of Master
COMMENTS
Master samples
INIT
and T
RC
as short as possible
DS18B20-PAR

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