A25L010 AMICC [AMIC Technology], A25L010 Datasheet - Page 17

• Manufacturer Part Number: A25L010
• Description: 16Mbit Low Voltage, Serial Flash Memory With 100MHz Uniform 4KB Sectors
• Manufacturer: AMICC [AMIC Technology]

Read Data Bytes at Higher Speed (FAST_READ)
The device is first selected by driving Chip Select (
The instruction code for the Read Data Bytes at Higher
Speed (FAST_READ) instruction is followed by a 3-byte
address (A23-A0) and a dummy byte, each bit being
latched-in during the rising edge of Serial Clock (C). Then the
memory contents, at that address, is shifted out on Serial
Data Output (DO), each bit being shifted out, at a maximum
frequency f
The instruction sequence is shown in Figure 9. The first byte
addressed can be at any location. The address is
automatically incremented to the next higher address after
each byte of data is shifted out. The whole memory can,
therefore, be read with a single Read Data Bytes at Higher
Figure 9. Read Data Bytes at Higher Speed (FAST_READ) Instruction Sequence and Data-Out Sequence
(April, 2008, Version 0.0)
C
, during the falling edge of Serial Clock (C).
DIO
DIO
DO
DO
S
S
C
C
32 33 34 35 36 37 38 39
7
0 1
6 5 4
High Impedance
Dummy Byte
Note:. Address bits A23 to A21 are Don’t Care, for A25L016
2 3 4
Instruction
3
2
5 6 7
1
0
S
MSB
40 41 42 43 44 45 46 47
7 6 5 4 3 2 1
MSB
) Low.
23 22 21
8
9
24-Bit Address
Data Out 1
10
16
Speed (FAST_READ) instruction. When the highest address
is reached, the address counter rolls over to 000000h,
allowing the read sequence to be continued indefinitely.
The Read Data Bytes at Higher Speed (FAST_READ)
instruction is terminated by driving Chip Select (
Chip Select (
output. Any Read Data Bytes at Higher Speed (FAST_READ)
instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle
that is in progress.
3 2 1 0
28 29 30 31
0
S
0
MSB
) can be driven High at any time during data
7 6 5 4 3 2 1 0
Data Out 2
.
AMIC Technology Corp.
A25L016 Series
MSB
7
S
) High.