A1280DX-1CQB ACTEL [Actel Corporation], A1280DX-1CQB Datasheet - Page 15

• Manufacturer Part Number: A1280DX-1CQB
• Description: Integrator Series FPGAs: 1200XL and 3200DX Families
• Manufacturer: ACTEL [Actel Corporation]

I n t e g r a t o r S e r i e s F PG A s : 1 2 0 0 X L a n d 3 2 0 0 D X F a m i l i e s
E q u iv al en t C ap a ci t an c e
The power dissipated by a CMOS circuit can be expressed by
Equation 1
where:
Equivalent capacitance is calculated by measuring I
at a specified frequency and voltage for each circuit
component of interest. Measurements have been made over
a range of frequencies at a fixed value of V
capacitance is frequency-independent, so the results may
be used over a wide range of operating conditions.
Equivalent capacitance values are shown below.
C
Modules (C
Input Buffers (C
Output Buffers (C
Routed Array Clock Buffer Loads (C
To calculate the active power dissipated from the complete
design, the switching frequency of each part of the logic
must be known. Equation 2 shows a piece-wise linear
summation over all components.
Power = V
(n *
0.5 * (q
0.5 * (q
where:
m
n
p
q
q
r
r
C
C
C
C
C
f
f
m
n
1
2
1
2
EQM
EQI
EQO
EQCR
L
E Q
C
C
(pF).
V
F is the switching frequency in megahertz (MHz).
Val ue s f o r A ct el FP G A s
EQI
CC
EQ
= Number of logic modules switching at frequency f
= Number of input buffers switching at frequency f
= Number of output buffers switching at frequency f
= Number of clock loads on the first routed array
= Number of clock loads on the second routed array
= lFixed capacitance due to first routed array clock
= Fixed capacitance due to second routed array
= Equivalent capacitance of logic modules in pF
= Equivalent capacitance of input buffers in pF
= Equivalent capacitance of output buffers in pF
= Equivalent capacitance of routed array clock in pF
= Output load capacitance in p
= Average logic module switching rate in MHz
= Average input buffer switching rate in MHz
1
2
*
*
clock
clock
clock
* f
is power supply in volts (V).
is the equivalent capacitance expressed in picofarads
CC
C
C
n
EQCR
EQCR
EQM
2
)
Inputs
* [(m x
Power (µW) = C
)
* f
* f
EQI
q1
q2
EQO
+ (p * (
)
)
)
C
routed_Clk1
routed_Clk2
)
EQM
C
* f
EQO
m
EQ
)
+ C
Modules
+ (r
+ (r
* V
L
1
2
) * f
CC
EQCR
* f
* f
+
2
q1
q2
p
* F
)
)
)
)
outputs
routed_Clk1
routed_Clk2
CC
. Equivalent
+
+
(2)
Discontinued – v3.0
CCactive
11.6
23.8
5.2
3.5
(1)
n
m
p
f
f
f
F ix ed C ap a ci t an c e V a lu es f or A c t el F P G A s
( p F )
Table 5.
D e t e r m i n i n g Av e r a g e S w i t c h i n g F re qu en c y
To determine the switching frequency for a design, the user
must have a detailed understanding of the data input values
to the circuit. The following guidelines represent worst-case
scenarios; they can be generally used to predict the upper
limits of power dissipation.
p
q1
q2
Device Type
A1225XL
A1240XL
A3265DX
A1280XL
A32100DX
A32140DX
A32200DX
A32300DX
Logic Modules (m)
Inputs Switching (n)
Outputs Switching (p)
First Routed Array Clock Loads
(q
Second Routed Array Clock
Loads (q
Load Capacitance (C
Average Logic Module Switching
Rate (f
Average Input Switching Rate
(f
Average Output Switching Rate
(f
Average First Routed Array
Clock Rate (f
Average Second Routed Array
Clock Rate (f
n
p
1
)
)
)
= Average output buffer switching rate in MHz
= Average first routed array clock rate in MHz
= Average second routed array clock rate in MHz
m
)
2
)
q1
q2
)
)
L
routed_Clk1
)
106
134
158
168
178
190
230
285
r
1
= 80% of
= # of Inputs/4
= # Outputs/4
= 40% of Sequential
= 40% of Sequential
= 35 pF
= F/10
= F/5
= F/10
= F
= F/2
Combinatorial
Modules
Modules
Modules
routed_Clk2
106
134
158
168
178
190
230
285
r
2
15