CS4294-JQ CIRRUS [Cirrus Logic], CS4294-JQ Datasheet - Page 11

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CS4294-JQ

Manufacturer Part Number
CS4294-JQ
Description
SoundFusion Audio/Docking Codec 97 (AMC 97)
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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the next falling edge of the BIT_CLK clock signal.
The Controller is also responsible for issuing reset
via the RESET# signal. After being reset, the Co-
dec is responsible for flagging the Controller that it
is ready for operation after synchronizing its inter-
nal functions. The AC-link signals may be refer-
enced to either 5 Volts or 3.3 Volts. The CS4294
must use the same digital supply voltage as the
Controller chip.
DS326PP4
Digital AC’97
Controller
SDATA_OUT
Mode Control
RESET#
Figure 7. AC-link Connections
SYNC
MIC1
LINE
AUX
CD
SDATA_OUT
SDATA_IN
PCM_OUT
BIT_CLK
RESET#
2
2
2
SYNC
/
/
/
3
2
CONVERTERS
/
/
MAIN D/A
+20dB
DAC
VOL
VOL
VOL
VOL
VOL
2
/
MUTE
MUTE
MUTE
MUTE
MUTE
CODEC
PCM OUT
MONO MIXER
PATH
STEREO TO
ADC
Figure 8. Mixer Diagram
STEREO
INPUT
MIXER
AC-Link Interface
3.2 Control registers
All read accesses to the Codec are generated by re-
questing a register address (index number) in slot 1
of a SDATA_OUT frame. The following
SDATA_IN frame will contain the register content
in its slot 2. The write operation is identical with the
index in slot 1 and the write data in slot 2. The
AC ‘97 Frame Definition section details the func-
tion of each input and output frame. Individual reg-
ister descriptions are found in the Register
Interface section.
AC-97 Register Interface
The CS4294 implements the AC ’97 Registers in
accordance with the AC ’97 2.0 Specification. See
the Register Interface section for details on the
CS4294’s register set.
4. ANALOG SECTION
Please refer to Figure 8, Mixer diagram, for a high-
level graphical representation of the CS4294 ana-
log mixer structure.
3D
DAC
INPUT
MUX
ADC
STEREO
OUTPUT
MIXER
MAIN ADC GAIN
VOL
MUTE
MASTER VOLUME
ALTERNATE VOLUME
VOL
VOL
2
/
6
ADC
/
OUTPUT
BUFFER
OUTPUT
BUFFER
2
2
/
/
LINE_OUT
ALT_LINE_OUT
SDATA_IN
BIT_CLK
GPIO
CS4294
11

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