SM8578BV Nippon_Precision_Circuits America, SM8578BV Datasheet - Page 6

• Manufacturer Part Number: SM8578BV
• Description: Real-time Clock ic
• Manufacturer: Nippon_Precision_Circuits America

FUNCTIONAL DESCRIPTION
Registers
1. When power is applied, all register values are undefined. Accordingly, all registers must be set by initial input data.
2. When address D is read, the previous preset data value is output.
3. Bits AF and TF can only be set to 0 by writing to address E (i.e. reset only).
Clock and calendar registers (address 0 to 6)
Data in these registers is interpreted in BCD format.
For example, if the second register contains
0101 1001, then the contents of the register is inter-
preted as the value 59 seconds. Hour register con-
tents are values expressed in 24-hour mode.
Leap-year detection is made by dividing the year
register contents (2 BCD digits) by 4. If the remain-
der is 0, corresponding to a leap year, the values in
the weekday and day registers are adjusted automati-
cally. Note that the year following year 99 is year 00.
The weekday register contains values representing
the day of the week as shown in the following table.
Note that software measures should be taken to
ensure that only one bit is set to 1.
Bit 6
A d dres
= don’t care. All don’t care bits can be used as general-purpose RAM.
0
0
0
0
A
B
C
D
E
s
0
1
2
3
4
5
6
7
8
9
F
Bit 5
0
0
0
0
Output frequency
Cycle frequency
Interval counter
Weekday alarm
Minute alarm
Bit 4
Hour alarm
Day alarm
Register
Weekday
Control 1
Control 2
Second
0
0
0
0
Minute
Month
Hour
Year
Day
Bit 3
1
0
0
0
1
2
Bit 2
0
0
1
0
Bit 7
FOS
128
AE
AE
AE
AE
FE
TE
80
fr
fr
fr
fr
fr
Bit 1
0
1
0
0
TEST
Bit 6
40
40
40
40
64
6
6
Bit 0
1
0
0
0
Wednesday
Bit 5
FD4
TD1
W e e k d ay
20
20
20
20
20
20
20
20
32
Tuesday
5
5
Monday
Sunday
RESE
SM8578BV
TI/TP
Bit 4
FD3
TD0
10
10
10
10
10
10
10
10
10
16
T
4
4
HOLD
The FOS bit is the oscillator stop flag. It indicates
that the oscillator has stopped due to output voltage
reduction during operation. It is set to 1 when the
oscillator stops, and remains 1 until reset by writing
0 to FOS. It is not affected by the function of other
bits.
The fr bits are the read flags. They indicate that the
contents of the corresponding register generated an
overflow bit while a read cycle was in progress (CE
= HIGH). If any fr bit encountered is set to 1, then all
clock timer registers must be read again. The fr bits
are cleared to 0 when CE goes LOW.
The seconds and year registers do not have fr bits to
indicate overflow. Instead, the value of the two most
significant bits (bits 5 and 6 in the seconds register,
Bit 3
AF
Bit 6
8
8
8
3
8
8
8
8
8
3
8
8
0
0
1
Bit 5
Bit 2
FD2
0
1
0
TF
4
4
4
2
4
4
4
4
4
2
4
4
Bit 4
1
0
0
Bit 1
FD1
AIE
2
2
2
1
2
2
2
2
2
1
2
2
Bit 3
0
0
0
NIPPON PRECISION CIRCUITS—6
Bit 0
FD0
TIE
1
1
1
0
1
1
1
1
1
0
1
1
Bit 2
0
0
0
R e a d a b le
Bit 1
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
0
0
0
Bit 0
0
0
0
All bits (excl. bit 7)
All bits (excl. bit 7)
All bits (excl. bit 7)
All bits (excl. bit 7)
All bits (excl. bit 7)
Writable
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
All bits
W e e k d ay
Thursday
Saturday
Friday
3