LP38691DTX-1.8 NSC [National Semiconductor], LP38691DTX-1.8 Datasheet - Page 12

• Manufacturer Part Number: LP38691DTX-1.8
• Description: 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors
• Manufacturer: NSC [National Semiconductor]

www.national.com
Application Hints
EXTERNAL CAPACITORS
Like any low-dropout regulator, external capacitors are re-
quired to assure stability. These capacitors must be correctly
selected for proper performance.
INPUT CAPACITOR: An input capacitor of at least 1µF is
required (ceramic recommended). The capacitor must be
located not more than one centimeter from the input pin and
returned to a clean analog ground.
OUTPUT CAPACITOR: An output capacitor is required for
loop stability. It must be located less than 1 centimeter from
the device and connected directly to the output and ground
pins using traces which have no other currents flowing
through them.
The minimum amount of output capacitance that can be
used for stable operation is 1µF. Ceramic capacitors are
recommended (the LP38691/3 was designed for use with
ultra low ESR capacitors). The LP38691/3 is stable with any
output capacitor ESR between zero and 100 Ohms.
ENABLE PIN (LP38693 only): The LP38693 has an enable
pin which turns the regulator output on and off. Pulling the
enable pin down to a logic low will turn the part off. The
voltage the pin has to be pulled up to in order to assure the
part is on depends on input voltage (refer to Electrical Char-
acteristics section). This pin should be tied to V
enable function is not used.
Foldback Current Limiting: Foldback current limiting is
built into the LP38691/3 which reduces the amount of output
current the part can deliver as the output voltage is reduced.
The amount of load current is dependent on the differential
voltage between V
tial voltage exceeds 5V, the load current will limit at about
350 mA. When the V
4V, load current is limited to about 850 mA.
SELECTING A CAPACITOR
It is important to note that capacitance tolerance and varia-
tion with temperature must be taken into consideration when
selecting a capacitor so that the minimum required amount
of capacitance is provided over the full operating tempera-
ture range.
Capacitor Characteristics
CERAMIC: For values of capacitance in the 10 to 100 µF
range, ceramics are usually larger and more costly than
tantalums but give superior AC performance for bypassing
high frequency noise because of very low ESR (typically less
than 10 mΩ). However, some dielectric types do not have
good capacitance characteristics as a function of voltage
and temperature.
Z5U and Y5V dielectric ceramics have capacitance that
drops severely with applied voltage. A typical Z5U or Y5V
capacitor can lose 60% of its rated capacitance with half of
the rated voltage applied to it. The Z5U and Y5V also exhibit
a severe temperature effect, losing more than 50% of nomi-
nal capacitance at high and low limits of the temperature
range.
X7R and X5R dielectric ceramic capacitors are strongly rec-
ommended if ceramics are used, as they typically maintain a
capacitance range within
ing ratings of temperature and voltage. Of course, they are
typically larger and more costly than Z5U/Y5U types for a
given voltage and capacitance.
IN
and V
IN
- V
±
OUT
OUT
20% of nominal over full operat-
. Typically, when this differen-
differential is reduced below
IN
if the
12
TANTALUM: Solid Tantalum capacitors have good tempera-
ture stability: a high quality Tantalum will typically show a
capacitance value that varies less than 10-15% across the
full temperature range of -40˚C to +125˚C. ESR will vary only
about 2X going from the high to low temperature limits.
PCB LAYOUT
Good PC layout practices must be used or instability can be
induced because of ground loops and voltage drops. The
input and output capacitors must be directly connected to the
input, output, and ground pins of the regulator using traces
which do not have other currents flowing in them (Kelvin
connect).
The best way to do this is to lay out C
device with short traces to the V
The regulator ground pin should be connected to the exter-
nal circuit ground so that the regulator and its capacitors
have a "single point ground".
It should be noted that stability problems have been seen in
applications where "vias" to an internal ground plane were
used at the ground points of the IC and the input and output
capacitors. This was caused by varying ground potentials at
these nodes resulting from current flowing through the
ground plane. Using a single point ground technique for the
regulator and it’s capacitors fixed the problem. Since high
current flows through the traces going into V
from V
so there is no voltage drop in series with the input and output
capacitors.
RFI/EMI SUSCEPTIBILITY
RFI (radio frequency interference) and EMI (electromagnetic
interference) can degrade any integrated circuit’s perfor-
mance because of the small dimensions of the geometries
inside the device. In applications where circuit sources are
present which generate signals with significant high fre-
quency energy content (
ensure that this does not affect the IC regulator.
If RFI/EMI noise is present on the input side of the regulator
(such as applications where the input source comes from the
output of a switching regulator), good ceramic bypass ca-
pacitors must be used at the input pin of the IC.
If a load is connected to the IC output which switches at high
speed (such as a clock), the high-frequency current pulses
required by the load must be supplied by the capacitors on
the IC output. Since the bandwidth of the regulator loop is
less than 100 kHz, the control circuitry cannot respond to
load changes above that frequency. This means the effective
output impedance of the IC at frequencies above 100 kHz is
determined only by the output capacitor(s).
In applications where the load is switching at high speed, the
output of the IC may need RF isolation from the load. It is
recommended that some inductance be placed between the
output capacitor and the load, and good RF bypass capaci-
tors be placed directly across the load.
PCB layout is also critical in high noise environments, since
RFI/EMI is easily radiated directly into PC traces. Noisy
circuitry should be isolated from "clean" circuits where pos-
sible, and grounded through a separate path. At MHz fre-
quencies, ground planes begin to look inductive and RFI/
EMI can cause ground bounce across the ground plane. In
multi-layer PCB applications, care should be taken in layout
so that noisy power and ground planes do not radiate directly
into adjacent layers which carry analog power and ground.
OUT
, Kelvin connect the capacitor leads to these pins
>
1 MHz), care must be taken to
IN
, V
OUT
IN
and C
, and ground pins.
IN
OUT
and coming
near the