ADR435 AD [Analog Devices], ADR435 Datasheet - Page 36

• Manufacturer Part Number: ADR435
• Description: Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA Output
• Manufacturer: AD [Analog Devices]

AD5735
Software Register
The software register allows the user to perform a software reset of
the part. This register is also used to set the user toggle bit, D11,
in the status register and as part of the watchdog timer feature
when that feature is enabled.
Bit D12 in the software register can be used to ensure that
communication has not been lost between the MCU and the
AD5735
is, SDIN, SCLK, and SYNC ).
Table 25. Programming the Software Register
D15
1
Table 26. Software Register Bit Descriptions
Bit Name
User Program
Reset Code/SPI Code
Table 27. Programming the DC-to-DC Control Register
D15
0
1
Table 28. DC-to-DC Control Register Bit Descriptions
Bit Name
DC-DC Comp
DC-DC Phase
DC-DC Freq
DC-DC MaxV
X = don’t care.
and that the datapath lines are working properly (that
D14
1
Description
This bit is mapped to Bit D11 of the status register. When this bit is set to 1, Bit D11 of the status register is set to 1.
When this bit is set to 0, Bit D11 of the status register is also set to 0. This feature can be used to ensure that the SPI
pins are working correctly by writing a known bit value to this register and then reading back Bit D11 from the
status register.
Option
Reset code
SPI code
Description
Selects the internal compensation resistor or an external compensation resistor for the dc-to-dc converter. See the
DC-to-DC Converter Compensation Capacitors section and the AI
0 = selects the internal 150 kΩ compensation resistor (default).
1 = bypasses the internal compensation resistor. When this bit is set to 1, an external compensation resistor must
be used; this resistor is placed at the COMP
ground. Typically, a resistor of ~50 kΩ is recommended.
User-programmable dc-to-dc converter phase (between channels).
00 = all dc-to-dc converters clock on the same edge (default).
01 = Channel A and Channel B clock on the same edge; Channel C and Channel D clock on the opposite edge.
10 = Channel A and Channel C clock on the same edge; Channel B and Channel D clock on the opposite edge.
11 = Channel A, Channel B, Channel C, and Channel D clock 90° out of phase from each other.
Switching frequency for the dc-to-dc converter; this frequency is divided down from the internal 13 MHz oscillator
(see Figure 67 and Figure 68).
00 = 250 kHz ± 10%.
01 = 410 kHz ± 10% (default).
10 = 650 kHz ± 10%.
Maximum allowed V
00 = 23 V + 1 V/−1.5 V (default).
01 = 24.5 V ± 1 V.
10 = 27 V ± 1 V.
11 = 29.5 V ± 1 V.
D14
0
D13
1
D12 to D7
X
1
BOOST_x
D13
0
Description
Writing 0x555 to Bits[D11:D0] performs a software reset of the AD5735.
If the watchdog timer feature is enabled, 0x195 must be written to the software register
(Bits[D11:D0]) within the programmed timeout period (see Table 22).
voltage supplied by the dc-to-dc converter.
D6
DC-DC comp
Rev. B | Page 36 of 48
DCDC_x
pin in series with the 10 nF dc-to-dc compensation capacitor to
When the watchdog timer feature is enabled, the user must write
0x195 to Bits[D11:D0] of the software register within the timeout
period. If this command is not received within the timeout period,
the ALERT pin signals a fault condition. This command is only
required when the watchdog timer feature is enabled.
DC-to-DC Control Register
The dc-to-dc control register allows the user to configure the
dc-to-dc switching frequency and phase, as well as the maxi-
mum allowable dc-to-dc output voltage. The dc-to-dc control
register options are shown in Table 27 and Table 28.
D12
User program
D5 to D4
DC-DC phase
CC
Supply Requirements—Slewing section.
D3 to D2
DC-DC freq
D11 to D0
Reset code/SPI code
D1 to D0
DC-DC MaxV
Data Sheet