LTAEY LINEAR [Linear Integrated Systems], LTAEY Datasheet
LTAEY
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LTAEY Summary of contents
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FEATURES 16-Bit Differential ADC in a Tiny MSOP Low Supply Current: 200 Autosleep Rail-to-Rail Differential Input/Reference 0.12LSB INL, No Missing Codes 0.16LSB Full-Scale Error and 5 V Offset 1.45 V RMS Noise, Independent of V Very ...
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... REF = 5V, REF = GND, – (Note 12 ORDER PART NUMBER LTC2433-1CMS TOP VIEW LTC2433-1IMS SCK 8 SDO GND MS PART MARKING MS10 PACKAGE = 125 C, = 110 C/W LTAEY JA LTAEZ MIN TYP MAX 16 0.06 0.12 1.25 0. 0.16 1.25 0.04 0.16 1.25 0.04 0.20 0.20 0.25 1.45 U UNITS Bits LSB LSB LSB V nV/ C ...
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U CO VERTER CHARACTERISTICS temperature range, otherwise specifications are at T PARAMETER CONDITIONS Input Common Mode Rejection DC 2.5V REF GND IN Input Common Mode Rejection 2.5V REF 49Hz to 61.2Hz GND IN Input Normal Mode Rejection (Note 5, 7) ...
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LTC2433 DIGITAL I PUTS A D DIGITAL OUTPUTS operating temperature range, otherwise specifications are at T SYMBOL PARAMETER V High Level Input Voltage IH CS Low Level Input Voltage IL CS High ...
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CHARACTERISTICS range, otherwise specifications are SYMBOL PARAMETER f External Oscillator Frequency Range EOSC t External Oscillator High Period HEO t External Oscillator Low Period LEO t Conversion Time CONV f Internal SCK ...
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LTC2433 CTIO S V (Pin 1): Positive Supply Voltage. Bypass to GND with tantalum capacitor in parallel with 0.1 F ceramic capacitor as close to the part as possible. + – ...
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CTIO AL DIAGRA V CC GND + + IN – – IN DAC + REF – REF TEST CIRCUITS SDO 1.69k Hi Hi ADC Figure ...
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LTC2433 APPLICATIO S I FOR ATIO CONVERTER OPERATION Converter Operation Cycle The LTC2433 low power, input/reference and an easy-to-use 3-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating ...
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U U APPLICATIO S I FOR ATIO The LTC2433-1 performs offset and full-scale calibrations every conversion cycle. This calibration is transparent to the user and has no effect on the cyclic operation de- scribed above. The advantage of continuous calibration ...
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LTC2433 APPLICATIO S I FOR ATIO Bit 18 (first output bit) is the end of conversion (EOC) indicator. This bit is available at the SDO pin during the conversion and sleep states whenever the CS pin is LOW. ...
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U U APPLICATIO S I FOR ATIO Table 2. LTC2433-1 Output Data Format Differential Input Voltage 0.5 • REF 0.5 • – 1LSB REF 0.25 • REF 0.25 ...
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LTC2433 APPLICATIO S I FOR ATIO operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock. If ...
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U U APPLICATIO S I FOR ATIO In addition, the CS signal can be used to trigger a new conversion cycle before the entire serial data transfer has been completed. The LTC2433-1 will abort any serial data transfer in progress ...
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LTC2433 APPLICATIO S I FOR ATIO The serial data output pin (SDO) is Hi-Z as long HIGH. At any time during the conversion cycle, CS may be pulled LOW in order to monitor the state ...
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U U APPLICATIO S I FOR ATIO External Serial Clock, 2-Wire I/O This timing mode utilizes a 2-wire serial I/O interface. The conversion result is shifted out of the device by an exter- nally generated serial clock (SCK) signal, see ...
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LTC2433 APPLICATIO S I FOR ATIO <t EOCtest CS SDO Hi-Z Hi-Z SCK (INTERNAL) CONVERSION SLEEP SLEEP TEST EOC (OPTIONAL) and the device begins outputting data at time t the falling edge of CS (if EOC = 0) ...
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U U APPLICATIO S I FOR ATIO > t EOCtest CS TEST EOC BIT 0 SDO EOC Hi-Z Hi-Z Hi-Z SCK (INTERNAL) SLEEP CONVERSION SLEEP DATA OUTPUT (OPTIONAL) Figure 10. Internal Serial Clock, Reduced Data Output Length disabled. Hence, SCK ...
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LTC2433 APPLICATIO S I FOR ATIO CS BIT 18 BIT 17 SDO EOC SCK (INTERNAL) CONVERSION During the conversion, the SCK and the serial data output pin (SDO) are HIGH (EOC = 1). Once the conversion is complete, ...
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U U APPLICATIO S I FOR ATIO During the conversion period, the undershoot and/or overshoot of a fast digital signal connected to the LTC2433-1 pins may severely disturb the analog to digital conversion process. Undershoot and overshoot can oc- cur ...
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LTC2433 APPLICATIO S I FOR ATIO REF R (TYP LEAK 20k V + REF I LEAK (TYP LEAK 20k LEAK ...
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U U APPLICATIO S I FOR ATIO REF = 5V – REF = GND + IN = GND – 2. 0pF IN – GND ...
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LTC2433 APPLICATIO S I FOR ATIO In addition to this gain error, an offset error term may also appear. The offset error is proportional with the mismatch between the source impedance driving the two input pins + – ...
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U U APPLICATIO S I FOR ATIO Larger values of reference capacitors (C be required as reference filters in certain configurations. Such capacitors will average the reference sampling charge and the external source resistance will see a quasi con- stant ...
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LTC2433 APPLICATIO S I FOR ATIO –6 translates into about 7.15 • 10 • f EOSC error. Figure 23 shows the typical INL error due to the source resistance driving the REF large C values are used. The ...
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U U APPLICATIO S I FOR ATIO input and/or reference capacitors (C previous section provides formulae for evaluating the effect of the source resistance upon the converter perfor- mance for any value small external input and/ ...
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LTC2433 APPLICATIO S I FOR ATIO REF – GND REF V = 2.5V 12 INCM –2.5V < V < 2. ...
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PACKAGE DESCRIPTIO 5.23 (.206) MIN 0.305 0.038 (.0120 .0015) TYP RECOMMENDED SOLDER PAD LAYOUT GAUGE PLANE 0.18 (.007) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD ...
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LTC2433-1 U TYPICAL APPLICATIO PANASONIC EXB-2HV202G ARRAY V = 294mV REF 147mV INPUT RANGE 4.5 V LSB VISHAY MPM1001/5002B V REF 49mV INPUT RANGE 1.5 V LSB Figure 30. Increased Resolution Bridge/Temperature Measurement RELATED PARTS PART NUMBER ...