MG87FE/L2051 MEGAWIN [Megawin Technology Co., Ltd], MG87FE/L2051 Datasheet - Page 30

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MG87FE/L2051

Manufacturer Part Number
MG87FE/L2051
Description
8-bits microcontroll
Manufacturer
MEGAWIN [Megawin Technology Co., Ltd]
Datasheet
11.
The serial port(UART) of MG87FE/L2051/4051/6051 support full-duplex transmission. It can transmit and receive
simultaneously. The serial port receive and transmit share the same SFR – SBUF, but actually there is two
SBUFs in the chip, one is for transmit and the other is for receive. The serial port can be operated in 4 different
modes.
11.1. UART Structure
Mode 0
Serial data enters and exits through RXD(P3.0) and TXD(P3.1) outputs the shift clock. 8-bits are
transmitted/received with LSB first. The baud rate is fixed at 1/12 the system clock frequency.
Mode1
10 bits are transmitted through TXD or received through RXD. The frame data includes a start bit(0), 8 data bits
and a stop bit(1). One receive, the stop bit goes into RB8 in SFR – SCON. The baud rate is variable.
Mode2
11 bits are transmitted through TXD or received through RXD. The frame data includes a start bit(0), 8 data bits, a
programmable 9th bit and a stop bit(1). On transmit, the 9th data bit comes from TB8 in SCON. On receive, the
9th data bit goes into RB8 in SCON. The baud rate is programmable to either 1/32 or 1/64 the system clock
frequency.
Mode3
Mode 3 is the same as mode 2 except the baud rate is variable.
In all four modes, transmission is initiated by any instruction that use SBUF as a destination register. Reception is
initiated in mode 0 by the condition RI = 0 and REN = 1. Reception is initiated in the other modes by the incoming
start bit with 1-to-0 transition if REN=1.
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
30/56
Baud Rate in Mode 1 =
Baud Rate in Mode 3 =
Baud Rate in Mode 0 =
UART
MEGAWIN
MAKE YOU WIN
2
2
32
32
SMOD
SMOD
F
SYSCLK
12
X (timer1 overflow rate)
X (timer1 overflow rate)
MG87FE/L2051/4051/6051
Preliminary, v 1.03

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