Z90103 Zilog., Z90103 Datasheet
Z90103
Related parts for Z90103
Z90103 Summary of contents
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... CMOS Microcontroller for Consumer Television, Cable and Satellite Receiver Ap- plications. ROM RAM* Device (KB) (Bytes) Z90102 4 236 Z90103 6 236 Z90104 8 236 Note: *General-Purpose Lowest Cost DTC Family Member Low Power Consumption Fast Instruction Pointer - 1 MHz Two Standby Modes - STOP and HALT ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller GENERAL DESCRIPTION (Continued) together with the Z86C27 and Z86127 to provide support for mid range and low end TV applications. Zilog’s DTC offers fast execution, efficient use of memory, sophisticated interrupts, input/output bit manipulation ...
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Zilog XTAL1 RESET Oscillator XTAL2 WDT /RESET Counter Timer Counter Timer P30 P31 Port 3/ P34 Interrupt P35 P36 P60 P61 P62 Port 6 P63 P64 P65 AFCIN DS97TEL1902 40-Pin Low-Cost Digital Television Controller Program ...
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... OUT 21 HSYNC 22 VSYNC 23 Vred 4 PWM1 1 21 P35 P36 P34 P31 P30 XTAL1 Z90102 XTAL2 Z90103 /RESET Z90104 P60 40-Pin DIP GND P61 P62 VCC P63 P64 P65 AFCIN OSCIN 20 40 OSCOUT Figure 2. 40-Pin Mask-ROM Plastic DIP Table 1. 40-Pin Mask-ROM Plastic DIP ...
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Zilog 40-Pin Name 24 Vgreen 25 Vblue 26 Vblank 27-34 P20-27 35 PWM11 36 PWM10 37 PWM9 38 PWM8 39 PWM7 40 PWM6 DS97TEL1902 40-Pin Low-Cost Digital Television Controller Table 1. 40-Pin Mask-ROM Plastic DIP Function Video Green Video Blue ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller PIN DESCRIPTION XTAL1, XTAL2. (time-based input, output, respectively). These pins connect to the internal parallel-resonant clock crystal (4 MHz max) oscillator circuit with two capacitors to GND. XTAL1 is also used as an external ...
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Zilog ABSOLUTE MAXIMUM RATINGS Stresses greater than those listed under Absolute Maxi- mum Ratings may cause permanent damage to the de- vice. This is a stress rating only; operation of the device at any condition above those indicated in the ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller CAPACITANCE T = 25° GND = 0V; Freq =1.0 MHz; unmeasured pins to GND Parameter Max Input capacitance 10 Output 20 capacitance I/O capacitance 25 AFCIN input 10 capacitance DC ...
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Zilog AC CHARACTERISTICS Timing Diagrams XTAL1 TIN IRQN DS97TEL1902 40-Pin Low-Cost Digital Television Controller Figure 4. External Clock Figure 5. Counter Timer 8 9 Figure 6. Interrupt Request Z90102/90103/90104 ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller VCC Internal /RESET External /RESET HSYNC OSC2 Figure 7. Power-On Reset 13 Figure 8. On-Screen Display Zilog 11 14 DS97TEL1902 ...
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Zilog AC CHARACTERISTICS T = 0° +70° +4.5V to +5.5V Symbol Parameter 1 TpC Input Clock Period 2 TrC,TfC Clock Input Rise and Fall 3 TwC Input Clock Width 4 TwTinL ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION The Z8 DTCincorporates special functions to enhance the Z8’s versatility in consumer, industrial and television con- trol applications. Pulse Width Modulator (PWM). The has seven PWM channels (Figure 9). There are three ...
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Zilog DS97TEL1902 Figure 10. On-Screen Display Block Diagram Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller 1 13 ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION (Continued) The OSD features are as follows: Character Color: Seven kinds of color are specified on a row basis. Character Pixel Size: Four character pixel sizes are selected for a high resolution ...
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Zilog ( 7 Bits Wide) Row 1 Attribute Row 1 Column 1 Character Row 1 Column 2 Character Row 1 Column 3 Character Row 1 Column 4 Character Row 1 Column 5 Character Row 1 Column 6 Character Row 1 ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION (Continued) Hex Address ...
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Zilog Program Memory. The program ROM size (Figure 14). The IRQ vector table is located in the lower address space. The vector address is fetched after the correspond- ing interrupt and program control is passed to the ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION (Continued) Memory Mapped Register. All control registers and I/O ports (except Port 2 and Port 3) are assigned to program memory space. Address space FC00H contains OSD con- trol registers, PWM output ...
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Zilog REGISTER POINTER Working Register Group Pointer Z8 Reg. File %FF %FO %7F %0F %00 Note: All General-Purpose registers, PWM Registers, and Video RAM registers, Port 4, 5, and 6 registers are undefined ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION (Continued) Stack. Either the internal register file or the external data memory is used for the stack. An 8-bit Stack Pointer is used for the internal stack that resides within the 236 ...
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Zilog Interrupts. The DTC has six different interrupts from six different sources. These interrupts are maskable and pri- oritized (Figure 19). The six sources are divided as follows: Interrupt Request DS97TEL1902 40-Pin Low-Cost Digital Television Controller two sources are claimed ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller FUNCTIONAL DESCRIPTION (Continued) HALT Mode. The Z90102/3/4 is driven by two internal clocks, TCLK and SCLK. They both oscillate at the crystal frequency. TCLK provides the clock signal for the counter- timers and the ...
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Zilog Watch-Dog Timer (WDT). The Z90102/3/4 is equipped with a permanently enabled Watch-Dog Timer which must be refreshed every 12 ms. Failure to refresh the timer re- sults in a reset of the device. The WDT is permanently en- abled ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller STANDARD CHARACTER SETS 24 Zilog DS97TEL1902 ...
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Zilog SUMMARY Input/Output Circuits 20 Ohm IN Figure 22. Input Only (Pad Type 1) 20 Ohm IN Figure 23. Input Only, Schmitt-Triggered (Pad Type 2) VCC P OUT N Figure 24. Output Only (Pad Type 3) DS97TEL1902 40-Pin Low-Cost Digital ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller SUMMARY (Continued) VCC N VCC OUT N Figure 28. Output Only, 12-Volt Open-Drain (Pad Type 7) VCC RESET N Figure 29. Reset Input Circuit (Pad Type 8) 26 PAD STOP N P67 N P66 ...
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Zilog DTC CONTROL REGISTER DIAGRAMS Port Registers 02H Figure 31. Port 2 Register (Read/Write) P2M Figure 32. Port 2 Mode Register (Write Only) ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller DTC CONTROL REGISTER DIAGRAMS PWM Registers PWM1 UPPER FC12H Figure 35. PWM 1 High Value (Write Only) FC13H PWM1 LOWER ...
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Zilog PWM MODE FC10H Figure 43. PWM Mode Register (Write Only) DS97TEL1902 40-Pin Low-Cost Digital Television Controller PWM OUT Mode Control PWM 1 ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller Z8 REGISTER DIAGRAMS FC00H OSDC CNTRL Figure 45. OSD Control Register (Write Only) FC01H VERT POS Figure 46. ...
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Zilog BAR CNTRL FC06H Figure 51. OSD Bar Control Register (Write Only) FC07H BAR POS Figure 52. OSD Bar Position Register (Write Only) F1H ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller Z8 REGISTER DIAGRAMS (Continued) F4H R244 Figure 57. Counter/Timer 0 Register (F4H: Read/Write) F5H R245 PRE0 ...
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Zilog FAH R250 IRQ Reset Condition = 00H Figure 62. Interrupt Request Register (FAH: Read/Write) FBH R251 IMR Default after Reset Figure 63. ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller PACKAGE INFORMATION 34 Figure 68. 40-Pin DIP Package Diagram Zilog DS97TEL1902 ...
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... Zilog ORDERING INFORMATION Z90102, Z90103, Z90104 4 MHz 40-pin DIP Z90102/3/404PSC For fast results, contact your local Zilog sales office for as- sistance in ordering the part desired. CODE Package P = Plastic DIP Temperature S = 0°C to +70°C Example: Z 890103 DS97TEL1902 40-Pin Low-Cost Digital Television Controller ...
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Z90102/90103/90104 40-Pin Low-Cost Digital Television Controller 36 Zilog DS97TEL1902 ...