AD7225 Analog Devices, AD7225 Datasheet - Page 8

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AD7225

Manufacturer Part Number
AD7225
Description
LC2MOS Quad 8-Bit DAC with Separate Reference Inputs
Manufacturer
Analog Devices
Datasheet

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AD7225
SPECIFICATION RANGES
For the AD7225 to operate to rated specifications, its input ref-
erence voltage must be at least 4 V below the V
voltage. This voltage differential is the overhead voltage re-
quired by the output amplifiers.
The AD7225 is specified to operate over a V
+12 V
with a V
+15 V
proved zero code error, improved output sink capability with
outputs near AGND and improved negative going settling time.
Performance is specified over a wide range of reference voltages
from 2 V to (V
of standard reference generators to be used such as the AD580,
a +2.5 V bandgap reference and the AD584, a precision +10 V
reference. Note that an output voltage range of 0 V to +10 V re-
quires a nominal +15 V
UNIPOLAR OUTPUT OPERATION
This is the basic mode of operation for each channel of the
AD7225, with the output voltage having the same positive
polarity as V
(V
section which outlines the advantages of having negative V
Connections for the unipolar output operation are shown in Fig-
ure 13. The voltage at any of the reference inputs must never be
negative with respect to DGND. Failure to observe this precau-
tion may cause parasitic transistor action and possible device de-
struction. The code table for unipolar output operation is shown
in Table III.
SS
= AGND) or with positive/negative supplies (see op-amp
SS
5% to +15 V 10% (i.e., from +11.4 V to +16.5 V)
5% V
of –5 V 10%. Operation is also specified for a single
REF
Figure 13. Unipolar Output Circuit
DD
DD
. The AD7225 can be operated single supply
supply. Applying a V
– 4 V) with dual supplies. This allows a range
5% power supply voltage.
SS
of –5 V results in im-
DD
DD
range from
power supply
SS
).
–8–
BIPOLAR OUTPUT OPERATION
Each of the DACs of the AD7225 can be individually config-
ured to provide bipolar output operation. This is possible using
one external amplifier and two resistors per channel. Figure 14
shows a circuit used to implement offset binary coding (bipolar
operation) with DAC A of the AD7225. In this case
With R1 = R2
where D
latch A. (0
Mismatch between R1 and R2 causes gain and offset errors and,
therefore, these resistors must match and track over tempera-
ture. Once again the AD7225 can be operated in single supply
or from positive/negative supplies. Table IV shows the digital
code versus output voltage relationship for the circuit of Figure
14 with R1 = R2.
Note: 1 LSB
DAC Latch Contents
MSB
1 1 1 1
1 0 0 0
1 0 0 0
0 1 1 1
0 0 0 0
0 0 0 0
A
V
is a fractional representation of the digital word in
OUT
1 1 1 1
0 0 0 1
0 0 0 0
1 1 1 1
0 0 0 1
0 0 0 0
LSB
D
A
Table III. Unipolar Code Table
V
REF
255/256)
1
V
OUT
R2
R1
2
= (2 D
8
D
V
Analog Output
0 V
A
REF
V
A
V
V
V
V
V
REF
– 1) • V
REF
REF
REF
REF
REF
256
1
129
127
255
256
256
256
256
128
256
1
REF
R2
R1
V
V
REF
REF
2
REV. B

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