AD7545A Analog Devices, AD7545A Datasheet - Page 2

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AD7545A

Manufacturer Part Number
AD7545A
Description
CMOS 12-Bit Buffered Multiplying DAC
Manufacturer
Analog Devices
Datasheet

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AD7545A–SPECIFICATIONS
Parameter
STATIC PERFORMANCE
DYNAMIC PERFORMANCE
REFERENCE INPUT
ANALOG OUTPUTS
DIGITAL INPUTS
SWITCHING CHARACTERISTICS
POWER SUPPLY
NOTES
1
2
3
4
6
Specifications subject to change without notice.
Temperature range as follows: K, L Versions = 0°C to +70°C; B, C Versions = –25°C to +85°C; T, U Versions = –55°C to +125°C.
Sample tested to ensure compliance.
DB0–DB11 = 0 V to V
Feedthrough can be further reduced by connecting the metal lid on the ceramic package to DGND.
Logic inputs are MOS gates. Typical input current (+25°C) is less than 1 nA.
Resolution
Relative Accuracy
Differential Nonlinearity
Gain Error
Gain Temperature Coefficient
DC Supply Rejection
Output Leakage Current at OUT1
Current Settling Time
Propagation Delay
Digital-to-Analog Glitch Impulse
AC Feedthrough
Input Resistance
Output Capacitance
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
Chip Select to Write Setup Time
Chip Select to Write Hold Time
Write Pulse Width
Data Setup Time
Data Hold Time
V
I
DD
DD
∆Gain/∆Temperature
∆Gain/∆V
Input Change to 90%
of Final Analog Output)
At OUT1
(Pin 19 to GND)
C
C
V
V
I
DB0–DB11, WR, CS
t
t
t
t
t
IN
CS
CH
WR
DS
DH
IH
IL
OUT1
OUT1
DD
5
2, 4
2
2
(from Digital
DD
2
2
2
or V
DD
to 0 V.
2
2
Version
All
K, B, T
L, C, U
All
K, B, T
L, C, U
All
All
All
K, L
B, C
T, U
All
All
All
All
All
All
All
All
All
All
K, B, L, C
T, U
All
K, B, L, C
T, U
All
All
All
All
T
± 1/2
± 1/2
± 1
± 3
± 1
± 5
± 2
0.002
10
10
10
1
200
5
5
70
150
2.4
0.8
± 1
8
100
0
100
100
5
5
2
100
10
12
10
20
100
100
A
= + 25 C
V
DD
Limits
= +5 V
T
12
± 1/2
± 1/2
± 1
± 4
± 2
± 5
± 2
0.004
50
50
200
1
5
10
20
70
150
2.4
0.8
± 10
8
130
170
0
130
170
150
5
5
2
100
10
MIN
(V
–T
REF
MAX
=
1
–2–
10 V, V
T
12
± 1/2
± 1/2
± 1
± 3
± 1
± 5
± 2
0.002
10
10
10
1
150
5
5
10
20
70
150
13.5
1.5
± 1
8
75
75
0
75
75
60
5
15
2
100
10
A
= + 25 C
V
DD
Limits
OUT1
= +15 V
= O V, AGND = DGND unless otherwise noted)
T
12
± 1/2
± 1/2
± 1
± 4
± 2
± 5
± 2
0.004
50
50
200
1
5
10
20
70
150
13.5
1.5
± 10
8
85
95
0
85
95
80
5
15
2
100
10
MIN
–T
MAX
1
% per % max
pF max
Units
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
ppm/°C max
ppm/°C typ
nA max
nA max
nA max
µs max
ns max
nV sec typ
mV p-p typ
kΩ min
kΩ max
pF max
V min
V max
µA max
pF max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
V
mA max
µA max
µA typ
Test Conditions/Comments
Endpoint Measurement
All Grades Guaranteed 12-Bit
Monotonic Over Temperature
Measured Using Internal R
DAC Register Loaded with All 1s.
∆V
DB0–DB11 = 0 V; WR, CS = 0 V
To 1/2 LSB. OUT1 Load = 100 Ω,
C
from Falling Edge of WR, CS = 0 V.
OUT1 Load = 100 Ω, C
V
Alternately Loaded with All 0s and 1s.
V
Input Resistance TC = –300 ppm/°C typ
Typical Input Resistance = 15 kΩ
DB0–DB11 = 0 V, WR, CS = 0 V
DB0–DB11 = V
V
See Timing Diagram
t
± 5% For Specified Performance
All Digital Inputs V
All Digital Inputs 0 V or V
All Digital Inputs 0 V or V
CS
EXT
REF
REF
IN
DD
≥ t
= 0 or V
= AGND. OUT1 Load = 100 Ω,
= ± 10 V, 10 kHz Sine Wave
= 13 pF. DAC Output Measured
= ± 5%
WR
, T
CH
DD
≥ 0
DD
, WR, CS = 0 V
IL
or V
EXT
IH
DD
DD
FB
= 13 pF
.
REV. C
3

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